AIX support - alignment issues
Hi,
(sorry for sending this twice to you Noah, forgot -hackers the first time
round)
We've had a bunch of changes to manually deal with our alignment code not
understanding AIX alignment.
commit f3b421da5f4addc95812b9db05a24972b8fd9739
Author: Peter Eisentraut <peter_e@gmx.net>
Date: 2016-12-21 12:00:00 -0500
Reorder pg_sequence columns to avoid alignment issue
commit 79b716cfb7a1be2a61ebb4418099db1258f35e30
Author: Amit Kapila <akapila@postgresql.org>
Date: 2022-04-07 09:39:25 +0530
Reorder subskiplsn in pg_subscription to avoid alignment issues.
A good explanation of the problem is in /messages/by-id/20220402081346.GD3719101@rfd.leadboat.com
I strikes me as a remarkably bad idea to manually try to maintain the correct
alignment. Even with the tests added it's still quite manual and requires
contorted struct layouts (see e.g. [1]/messages/by-id/CAFiTN-uiAngcW50Trwa94F1EWY2BxEx+B38QSyX3DtV3dzEGhA@mail.gmail.com).
I think we should either teach our system the correct alignment rules or we
should drop AIX support.
If we decide we want to continue supporting AIX we should bite the bullet and
add a 64bit-int TYPALIGN_*. It might be worth to translate that to bytes when
building tupledescs, so we don't need more branches (reducing them compared to
today).
Personally I think we should just drop AIX. The amount of effort to keep it
working is substantial due to being quite different from other unices ([2]linking etc is handled entirely different, so there's a fair bit of dedicated AIX code around the buildsystem - a lot of it vestigial stuff, see references to aix3.2.5 etc.), the is
very outdated, the whole ecosystem is barely on lifesupport ([3]7.2 was released in 2015-10-05, 7.3 in 2021-12-10, the set of changes is pretty darn small for that timeframe https://www.ibm.com/common/ssi/cgi-bin/ssialias?infotype=AN&subtype=CA&htmlfid=897/ENUS221-328&appname=USN). And all of that
for very little real world use.
Afaics we don't have access to an up2date AIX system. Some of have access to
7.2 via the gcc compile farm, but not 7.3. Most other niche-y operating
systems we can start in a VM, but I've yet to see a legal and affordable way
to do that with AIX.
I think Noah has done quite a heroic effort at keeping the AIX animals in a
kind-of-healthy state, but without more widespread access and more widespread
usage it seems like a doomed effort.
Greetings,
Andres Freund
[1]: /messages/by-id/CAFiTN-uiAngcW50Trwa94F1EWY2BxEx+B38QSyX3DtV3dzEGhA@mail.gmail.com
[2]: linking etc is handled entirely different, so there's a fair bit of dedicated AIX code around the buildsystem - a lot of it vestigial stuff, see references to aix3.2.5 etc.
dedicated AIX code around the buildsystem - a lot of it vestigial stuff,
see references to aix3.2.5 etc.
[3]: 7.2 was released in 2015-10-05, 7.3 in 2021-12-10, the set of changes is pretty darn small for that timeframe https://www.ibm.com/common/ssi/cgi-bin/ssialias?infotype=AN&subtype=CA&htmlfid=897/ENUS221-328&appname=USN
pretty darn small for that timeframe
https://www.ibm.com/common/ssi/cgi-bin/ssialias?infotype=AN&subtype=CA&htmlfid=897/ENUS221-328&appname=USN
Bull / Atos stopped their AIX work in 2022-03-01 - unfortunately they
didn't even keep the announcement of that online.
https://www.linkedin.com/pulse/said-say-bull-closing-down-aix-open-source-platform-michaelis
https://github.com/power-devops/bullfreeware
On Sat, Jul 2, 2022 at 11:34 AM Andres Freund <andres@anarazel.de> wrote:
Personally I think we should just drop AIX. The amount of effort to keep it
working is substantial due to being quite different from other unices ([2]), the is
very outdated, the whole ecosystem is barely on lifesupport ([3]). And all of that
for very little real world use.
I tend to agree about dropping AIX. But I wonder if there is an
argument against that proposal that doesn't rely on AIX being relevant
to at least one user. Has supporting AIX ever led to the discovery of
a bug that didn't just affect AIX? In other words, are AIX systems
peculiar in some particular way that clearly makes them more likely to
flush out a certain class of bugs? What is the best argument *against*
desupporting AIX that you know of?
Desupporting AIX doesn't mean that any AIX users will be left in the
lurch immediately. Obviously these users will be able to use a
supported version of Postgres for several more years.
--
Peter Geoghegan
Peter Geoghegan <pg@bowt.ie> writes:
I tend to agree about dropping AIX. But I wonder if there is an
argument against that proposal that doesn't rely on AIX being relevant
to at least one user. Has supporting AIX ever led to the discovery of
a bug that didn't just affect AIX?
Searching the commit log quickly finds
591e088dd
datetime.c's parsing logic has assumed that strtod() will accept
a string that looks like ".", which it does in glibc, but not on
some less-common platforms such as AIX.
glibc's behavior is clearly not meeting the letter of the POSIX spec here.
a745b9365
I'm not sure how we've managed not to notice this problem, but it
seems to explain slow execution of the 017_shm.pl test script on AIX
since commit 4fdbf9af5, which added a speculative "pg_ctl stop" with
the idea of making real sure that the postmaster isn't there. In the
test steps that kill-9 and then restart the postmaster, it's possible
to get past the initial signal attempt before kill() stops working
for the doomed postmaster. If that happens, pg_ctl waited till
PGCTLTIMEOUT before giving up ... and the buildfarm's AIX members
have that set very high.
Admittedly, this one is more about "slow" than about "AIX".
57b5a9646
Most versions of tar are willing to overlook the missing terminator, but
the AIX buildfarm animals were not. Fix by inventing a new kind of
bbstreamer that just blindly adds a terminator, and using it whenever we
don't parse the tar archive.
Another place where we failed to conform to relevant standards.
b9b610577
Fix ancient violation of zlib's API spec.
And another.
Now, it's certainly possible that AIX is the only surviving platform
that hasn't adopted bug-compatible-with-glibc interpretations of
POSIX. But I think the standard is the standard, and we ought to
stay within it. So I find value in these fixes.
regards, tom lane
Hi,
On 2022-07-02 11:54:16 -0700, Peter Geoghegan wrote:
I tend to agree about dropping AIX. But I wonder if there is an
argument against that proposal that doesn't rely on AIX being relevant
to at least one user. Has supporting AIX ever led to the discovery of
a bug that didn't just affect AIX?
Yes, it clearly has. But I tend to think that that's far outweighed by the
complications triggered by AIX support. It'd be a different story if AIX
hadn't a very peculiar linking model and was more widely accessible.
What is the best argument *against* desupporting AIX that you know of?
Hm.
- a distinct set of system libraries that can help find portability issues
- With IBM's compiler it adds a, not otherwise used, compiler that PG builds
with. So the warnings could theoretically help find issues that we wouldn't
otherwise see - but I don't think that's been particularly useful (nor
monitored). And the compiler is buggy enough to add a fair bit work over the
years.
Desupporting AIX doesn't mean that any AIX users will be left in the
lurch immediately. Obviously these users will be able to use a
supported version of Postgres for several more years.
Right.
Greetings,
Andres Freund
On Sat, Jul 2, 2022 at 12:22 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
Now, it's certainly possible that AIX is the only surviving platform
that hasn't adopted bug-compatible-with-glibc interpretations of
POSIX. But I think the standard is the standard, and we ought to
stay within it. So I find value in these fixes.
I imagine that there is strong evolutionary pressure pushing minority
platforms in the direction of bug-compatible-with-glibc. There is
definitely a similar trend around things like endianness and alignment
pickiness. But it wasn't always so.
It seems fair to wonder if AIX bucks the glibc-compatible trend
because it is already on the verge of extinction. If it wasn't just
about dead already then somebody would have gone to the trouble of
making it bug-compatible-with-glibc by now. (To be clear, I'm not
arguing that this is a good thing.)
Maybe it is still worth hanging on to AIX support for the time being,
but it would be nice to have some idea of where we *will* finally draw
the line. If the complaints from Andres aren't a good enough reason
now, then what other hypothetical reasons might be good enough in the
future? It seems fairly likely that Postgres desupporting AIX will
happen (say) at some time in the next decade, no matter what happens
today.
--
Peter Geoghegan
Peter Geoghegan <pg@bowt.ie> writes:
Maybe it is still worth hanging on to AIX support for the time being,
but it would be nice to have some idea of where we *will* finally draw
the line. If the complaints from Andres aren't a good enough reason
now, then what other hypothetical reasons might be good enough in the
future? It seems fairly likely that Postgres desupporting AIX will
happen (say) at some time in the next decade, no matter what happens
today.
Agreed. But I think that this sort of thing is better driven by
"when there's no longer anyone willing to do the legwork" than
by project policy. IOW, we'll stop when Noah gets tired of doing
it (and no one steps up to take his place).
In the case at hand, given that the test added by 79b716cfb/c1da0acbb
correctly detects troublesome catalog layouts (and no I've not studied
it myself), I don't see that we have to do more right now.
I am a little concerned though that we don't have access to the latest
version of AIX --- that seems like a non-maintainable situation.
regards, tom lane
Hi,
On 2022-07-02 16:34:35 -0400, Tom Lane wrote:
Agreed. But I think that this sort of thing is better driven by
"when there's no longer anyone willing to do the legwork" than
by project policy. IOW, we'll stop when Noah gets tired of doing
it (and no one steps up to take his place).
I do think we should take the impact it has on everyone into account, not just
Noah's willingness. If it's just "does somebody still kind of maintain it"
then we'll bear the distributed cost of complications for irrelevant platforms
way longer than worthwhile.
In the case at hand, given that the test added by 79b716cfb/c1da0acbb
correctly detects troublesome catalog layouts (and no I've not studied
it myself), I don't see that we have to do more right now.
What made me look at this issue right now is that the alignment issue lead the
56bit relfilenode patch to move the relfilenode field to the start of pg_class
(ahead of the oid), because a 64bit value cannot be after a NameData. Now, I
think we can do a bit better by moving a few more fields around. But the
restriction still seems quite onerous.
Greetings,
Andres Freund
Andres Freund <andres@anarazel.de> writes:
What made me look at this issue right now is that the alignment issue lead the
56bit relfilenode patch to move the relfilenode field to the start of pg_class
(ahead of the oid),
Agreed, up with that we should not put. However ...
because a 64bit value cannot be after a NameData.
... this coding rule strikes me as utterly ridiculous. Why can't we
instead insist that NAMEDATALEN must be a multiple of 8? Anyone who
tries to make it different from that is likely to be wasting padding
space even on platforms where there's not a deeper problem.
regards, tom lane
On Sun, Jul 3, 2022 at 8:34 AM Tom Lane <tgl@sss.pgh.pa.us> wrote:
I am a little concerned though that we don't have access to the latest
version of AIX --- that seems like a non-maintainable situation.
The release history doesn't look toooo bad on that front: the live
versions are 7.1 (2010-2023), 7.2 (2015-TBA) and 7.3 (2021-TBA). 7.3
only came out half a year ago, slightly after Windows 11, which we
aren't testing yet either. Those GCC AIX systems seem to be provided
by IBM and the Open Source Lab at Oregon State University which has a
POWER lab providing ongoing CI services etc to various OSS projects,
so I would assume that upgrades (and retirement of the
about-to-be-desupported 7.1 system) will come along eventually.
I don't have a dog in this race, but AIX is clearly not in the same
category as HP-UX (and maybe Solaris is somewhere in between). AIX
runs on hardware you can buy today that got a major refresh last year
(Power 10), while HP-UX runs only on discontinued CPUs, so while it's
a no-brainer to drop HP-UX support, it's a trickier question for AIX.
I guess the way open source is supposed to work is that someone with a
real interest in PostgreSQL on AIX helps maintain it, not only keeping
it building and passing tests, but making it work really well (cf huge
pages, scalable event handling, probably more things that would be
obvious to an AIX expert...), and representing ongoing demand and
interests from the AIX user community...
Thomas Munro <thomas.munro@gmail.com> writes:
On Sun, Jul 3, 2022 at 8:34 AM Tom Lane <tgl@sss.pgh.pa.us> wrote:
I am a little concerned though that we don't have access to the latest
version of AIX --- that seems like a non-maintainable situation.
The release history doesn't look toooo bad on that front: the live
versions are 7.1 (2010-2023), 7.2 (2015-TBA) and 7.3 (2021-TBA). 7.3
only came out half a year ago, slightly after Windows 11, which we
aren't testing yet either. Those GCC AIX systems seem to be provided
by IBM and the Open Source Lab at Oregon State University which has a
POWER lab providing ongoing CI services etc to various OSS projects,
so I would assume that upgrades (and retirement of the
about-to-be-desupported 7.1 system) will come along eventually.
OK, we can wait awhile to see what happens on that.
I don't have a dog in this race, but AIX is clearly not in the same
category as HP-UX (and maybe Solaris is somewhere in between). AIX
runs on hardware you can buy today that got a major refresh last year
(Power 10), while HP-UX runs only on discontinued CPUs, so while it's
a no-brainer to drop HP-UX support, it's a trickier question for AIX.
Yeah. FTR, I'm out of the HP-UX game: due to a hardware failure,
I can no longer boot that installation. I would have preferred to
keep pademelon, with its pre-C99 compiler, going until v11 is EOL,
but that ain't happening. I see that EDB are still running a couple
of HP-UX/IA64 animals, but I wonder if they're prepared to do anything
to support those animals --- like, say, fix platform-specific bugs.
Robert has definitely indicated displeasure with doing so, but
I don't know if he makes the decisions on that.
I would not stand in the way of dropping HP-UX and IA64 support as of
v16. (I do still feel that HPPA is of interest, to keep us honest
about spinlock support --- but that dual-stack arrangement that IA64
uses is surely not part of anyone's future.)
I have no opinion either way about Solaris.
regards, tom lane
Hi,
On 2022-07-04 10:33:37 +1200, Thomas Munro wrote:
I don't have a dog in this race, but AIX is clearly not in the same
category as HP-UX (and maybe Solaris is somewhere in between).
The reason to consider whether it's worth supporting AIX is that it's library
model is very different from other unix like platforms (much closer to windows
though). We also have dedicated compiler support for it, which I guess could
separately be dropped.
Greetings,
Andres Freund
Hi,
On 2022-07-03 20:08:19 -0400, Tom Lane wrote:
I would have preferred to keep pademelon, with its pre-C99 compiler, going
until v11 is EOL, but that ain't happening.
I'm not too worried about that - clang with
-std=c89 -Wc99-extensions -Werror=c99-extensions
as it's running on mylodon for the older branches seems to do a decent
job. And is obviously much faster :)
I would not stand in the way of dropping HP-UX and IA64 support as of
v16.
Cool.
I do still feel that HPPA is of interest, to keep us honest
about spinlock support
I.e. forgetting to initialize them? Or the weird alignment stuff it has?
I'd started to work a patch to detect missing initialization for both
spinlocks and lwlocks, I think that'd be good to have for more common cases.
Greetings,
Andres Freund
Andres Freund <andres@anarazel.de> writes:
On 2022-07-03 20:08:19 -0400, Tom Lane wrote:
I do still feel that HPPA is of interest, to keep us honest
about spinlock support
I.e. forgetting to initialize them? Or the weird alignment stuff it has?
The nonzero initialization mainly, and to a lesser extent the weird
size of a lock. I think the fact that the active word is only part
of the lock struct is pretty well encapsulated.
I'd started to work a patch to detect missing initialization for both
spinlocks and lwlocks, I think that'd be good to have for more common cases.
No objection to having more than one check for this ;-)
regards, tom lane
On Mon, Jul 4, 2022 at 12:08 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
I would not stand in the way of dropping HP-UX and IA64 support as of
v16. (I do still feel that HPPA is of interest, to keep us honest
about spinlock support --- but that dual-stack arrangement that IA64
uses is surely not part of anyone's future.)
I tried to find everything relating to HP-UX, aCC, ia64 and hppa. Or
do you still want to keep the hppa bits for NetBSD (I wasn't sure if
your threat to set up a NetBSD/hppa system was affected by the
hardware failure you mentioned)? Or just leave it in there in
orphaned hall-of-fame state, like m68k, m88k, Vax?
Attachments:
0001-Remove-HP-UX-aCC-ia64-and-hppa-support.patchtext/x-patch; charset=US-ASCII; name=0001-Remove-HP-UX-aCC-ia64-and-hppa-support.patchDownload
From 78d5a122fef28e2dbfd307a584dbda5e830734cb Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Mon, 4 Jul 2022 16:24:16 +1200
Subject: [PATCH] Remove HP-UX, aCC, ia64 and hppa support.
HP-UX hardware is no longer produced. This removes support for:
HP-UX, the operating system.
HP aCC, the compiler.
HP/Intel Itanium (ia64), the CPU architecture discontinued in 2021.
HP PA-RISC (hppa), the CPU architecture discontinued in 2008.
---
configure | 99 +--------------
configure.ac | 8 --
contrib/pgcrypto/crypt-blowfish.c | 2 +-
doc/src/sgml/dfunc.sgml | 29 -----
doc/src/sgml/installation.sgml | 3 +-
doc/src/sgml/regress.sgml | 6 +-
doc/src/sgml/runtime.sgml | 19 ---
src/Makefile.shlib | 33 -----
src/backend/libpq/ifaddr.c | 12 +-
src/backend/port/hpux/tas.c.template | 40 -------
src/backend/port/tas/hpux_hppa.s | 28 -----
src/backend/tcop/postgres.c | 74 ------------
src/backend/utils/misc/ps_status.c | 17 ---
src/common/sprompt.c | 2 +-
src/include/miscadmin.h | 8 --
src/include/pg_config.h.in | 6 -
src/include/port/atomics.h | 6 -
src/include/port/atomics/arch-hppa.h | 17 ---
src/include/port/atomics/arch-ia64.h | 29 -----
src/include/port/atomics/fallback.h | 12 --
src/include/port/atomics/generic-acc.h | 106 ----------------
src/include/port/hpux.h | 3 -
src/include/storage/s_lock.h | 160 -------------------------
src/makefiles/Makefile.hpux | 47 --------
src/pl/plperl/ppport.h | 2 +-
src/port/dlopen.c | 50 +-------
src/port/getrusage.c | 1 -
src/template/hpux | 34 ------
src/test/regress/resultmap | 1 -
src/tools/msvc/Solution.pm | 2 -
src/tools/pginclude/cpluspluscheck | 3 -
src/tools/pginclude/headerscheck | 3 -
32 files changed, 13 insertions(+), 849 deletions(-)
delete mode 100644 src/backend/port/hpux/tas.c.template
delete mode 100644 src/backend/port/tas/hpux_hppa.s
delete mode 100644 src/include/port/atomics/arch-hppa.h
delete mode 100644 src/include/port/atomics/arch-ia64.h
delete mode 100644 src/include/port/atomics/generic-acc.h
delete mode 100644 src/include/port/hpux.h
delete mode 100644 src/makefiles/Makefile.hpux
delete mode 100644 src/template/hpux
diff --git a/configure b/configure
index fb07cd27d9..91b7b185f9 100755
--- a/configure
+++ b/configure
@@ -2994,7 +2994,6 @@ case $host_os in
darwin*) template=darwin ;;
dragonfly*) template=netbsd ;;
freebsd*) template=freebsd ;;
- hpux*) template=hpux ;;
linux*|gnu*|k*bsd*-gnu)
template=linux ;;
mingw*) template=win32 ;;
@@ -6856,100 +6855,6 @@ if test x"$pgac_cv_prog_CXX_cxxflags__qlonglong" = x"yes"; then
fi
-elif test "$PORTNAME" = "hpux"; then
- # On some versions of HP-UX, libm functions do not set errno by default.
- # Fix that by using +Olibmerrno if the compiler recognizes it.
-
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${CC} supports +Olibmerrno, for CFLAGS" >&5
-$as_echo_n "checking whether ${CC} supports +Olibmerrno, for CFLAGS... " >&6; }
-if ${pgac_cv_prog_CC_cflags_pOlibmerrno+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- pgac_save_CFLAGS=$CFLAGS
-pgac_save_CC=$CC
-CC=${CC}
-CFLAGS="${CFLAGS} +Olibmerrno"
-ac_save_c_werror_flag=$ac_c_werror_flag
-ac_c_werror_flag=yes
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-int
-main ()
-{
-
- ;
- return 0;
-}
-_ACEOF
-if ac_fn_c_try_compile "$LINENO"; then :
- pgac_cv_prog_CC_cflags_pOlibmerrno=yes
-else
- pgac_cv_prog_CC_cflags_pOlibmerrno=no
-fi
-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
-ac_c_werror_flag=$ac_save_c_werror_flag
-CFLAGS="$pgac_save_CFLAGS"
-CC="$pgac_save_CC"
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_prog_CC_cflags_pOlibmerrno" >&5
-$as_echo "$pgac_cv_prog_CC_cflags_pOlibmerrno" >&6; }
-if test x"$pgac_cv_prog_CC_cflags_pOlibmerrno" = x"yes"; then
- CFLAGS="${CFLAGS} +Olibmerrno"
-fi
-
-
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${CXX} supports +Olibmerrno, for CXXFLAGS" >&5
-$as_echo_n "checking whether ${CXX} supports +Olibmerrno, for CXXFLAGS... " >&6; }
-if ${pgac_cv_prog_CXX_cxxflags_pOlibmerrno+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- pgac_save_CXXFLAGS=$CXXFLAGS
-pgac_save_CXX=$CXX
-CXX=${CXX}
-CXXFLAGS="${CXXFLAGS} +Olibmerrno"
-ac_save_cxx_werror_flag=$ac_cxx_werror_flag
-ac_cxx_werror_flag=yes
-ac_ext=cpp
-ac_cpp='$CXXCPP $CPPFLAGS'
-ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
-
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-int
-main ()
-{
-
- ;
- return 0;
-}
-_ACEOF
-if ac_fn_cxx_try_compile "$LINENO"; then :
- pgac_cv_prog_CXX_cxxflags_pOlibmerrno=yes
-else
- pgac_cv_prog_CXX_cxxflags_pOlibmerrno=no
-fi
-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
-ac_ext=c
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_c_compiler_gnu
-
-ac_cxx_werror_flag=$ac_save_cxx_werror_flag
-CXXFLAGS="$pgac_save_CXXFLAGS"
-CXX="$pgac_save_CXX"
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_prog_CXX_cxxflags_pOlibmerrno" >&5
-$as_echo "$pgac_cv_prog_CXX_cxxflags_pOlibmerrno" >&6; }
-if test x"$pgac_cv_prog_CXX_cxxflags_pOlibmerrno" = x"yes"; then
- CXXFLAGS="${CXXFLAGS} +Olibmerrno"
-fi
-
-
fi
@@ -13823,7 +13728,7 @@ $as_echo "#define HAVE_STDBOOL_H 1" >>confdefs.h
fi
-for ac_header in atomic.h copyfile.h execinfo.h getopt.h ifaddrs.h langinfo.h mbarrier.h poll.h sys/epoll.h sys/event.h sys/ipc.h sys/personality.h sys/prctl.h sys/procctl.h sys/pstat.h sys/resource.h sys/select.h sys/sem.h sys/shm.h sys/signalfd.h sys/sockio.h sys/tas.h sys/uio.h sys/un.h termios.h ucred.h wctype.h
+for ac_header in atomic.h copyfile.h execinfo.h getopt.h ifaddrs.h langinfo.h mbarrier.h poll.h sys/epoll.h sys/event.h sys/ipc.h sys/personality.h sys/prctl.h sys/procctl.h sys/resource.h sys/select.h sys/sem.h sys/shm.h sys/signalfd.h sys/sockio.h sys/tas.h sys/uio.h sys/un.h termios.h ucred.h wctype.h
do :
as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
@@ -15987,7 +15892,7 @@ fi
LIBS_including_readline="$LIBS"
LIBS=`echo "$LIBS" | sed -e 's/-ledit//g' -e 's/-lreadline//g'`
-for ac_func in backtrace_symbols clock_gettime copyfile fdatasync getifaddrs getpeerucred getrlimit inet_pton kqueue mbstowcs_l memset_s poll posix_fallocate ppoll pstat pthread_is_threaded_np readlink readv setproctitle setproctitle_fast setsid shm_open strchrnul strsignal symlink syncfs sync_file_range uselocale wcstombs_l writev
+for ac_func in backtrace_symbols clock_gettime copyfile fdatasync getifaddrs getpeerucred getrlimit inet_pton kqueue mbstowcs_l memset_s poll posix_fallocate ppoll pthread_is_threaded_np readlink readv setproctitle setproctitle_fast setsid shm_open strchrnul strsignal symlink syncfs sync_file_range uselocale wcstombs_l writev
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
diff --git a/configure.ac b/configure.ac
index 6c6f997ee3..7fbfb6795f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -67,7 +67,6 @@ case $host_os in
darwin*) template=darwin ;;
dragonfly*) template=netbsd ;;
freebsd*) template=freebsd ;;
- hpux*) template=hpux ;;
linux*|gnu*|k*bsd*-gnu)
template=linux ;;
mingw*) template=win32 ;;
@@ -570,11 +569,6 @@ elif test "$PORTNAME" = "aix"; then
PGAC_PROG_CXX_CFLAGS_OPT([-qnoansialias])
PGAC_PROG_CC_CFLAGS_OPT([-qlonglong])
PGAC_PROG_CXX_CFLAGS_OPT([-qlonglong])
-elif test "$PORTNAME" = "hpux"; then
- # On some versions of HP-UX, libm functions do not set errno by default.
- # Fix that by using +Olibmerrno if the compiler recognizes it.
- PGAC_PROG_CC_CFLAGS_OPT([+Olibmerrno])
- PGAC_PROG_CXX_CFLAGS_OPT([+Olibmerrno])
fi
AC_SUBST(CFLAGS_UNROLL_LOOPS)
@@ -1452,7 +1446,6 @@ AC_CHECK_HEADERS(m4_normalize([
sys/personality.h
sys/prctl.h
sys/procctl.h
- sys/pstat.h
sys/resource.h
sys/select.h
sys/sem.h
@@ -1801,7 +1794,6 @@ AC_CHECK_FUNCS(m4_normalize([
poll
posix_fallocate
ppoll
- pstat
pthread_is_threaded_np
readlink
readv
diff --git a/contrib/pgcrypto/crypt-blowfish.c b/contrib/pgcrypto/crypt-blowfish.c
index a663852ccf..f89701b9bf 100644
--- a/contrib/pgcrypto/crypt-blowfish.c
+++ b/contrib/pgcrypto/crypt-blowfish.c
@@ -41,7 +41,7 @@
#ifdef __i386__
#define BF_ASM 0 /* 1 */
#define BF_SCALE 1
-#elif defined(__x86_64__) || defined(__alpha__) || defined(__hppa__)
+#elif defined(__x86_64__) || defined(__alpha__)
#define BF_ASM 0
#define BF_SCALE 1
#else
diff --git a/doc/src/sgml/dfunc.sgml b/doc/src/sgml/dfunc.sgml
index a635767621..7bdf7f6070 100644
--- a/doc/src/sgml/dfunc.sgml
+++ b/doc/src/sgml/dfunc.sgml
@@ -75,35 +75,6 @@ gcc -shared -o foo.so foo.o
</listitem>
</varlistentry>
- <varlistentry>
- <term>
- <systemitem class="osname">HP-UX</systemitem>
- <indexterm><primary>HP-UX</primary><secondary>shared library</secondary></indexterm>
- </term>
- <listitem>
- <para>
- The compiler flag of the system compiler to create
- <acronym>PIC</acronym> is <option>+z</option>. When using
- <application>GCC</application> it's <option>-fPIC</option>. The
- linker flag for shared libraries is <option>-b</option>. So:
-<programlisting>
-cc +z -c foo.c
-</programlisting>
- or:
-<programlisting>
-gcc -fPIC -c foo.c
-</programlisting>
- and then:
-<programlisting>
-ld -b -o foo.sl foo.o
-</programlisting>
- <systemitem class="osname">HP-UX</systemitem> uses the extension
- <filename>.sl</filename> for shared libraries, unlike most other
- systems.
- </para>
- </listitem>
- </varlistentry>
-
<varlistentry>
<term>
<systemitem class="osname">Linux</systemitem>
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index c585078029..6ab3a65e48 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -1974,7 +1974,6 @@ build-postgresql:
shared libraries. The systems on which this is
<emphasis>not</emphasis> necessary include
<systemitem class="osname">FreeBSD</systemitem>,
- <systemitem class="osname">HP-UX</systemitem>,
<systemitem class="osname">Linux</systemitem>,
<systemitem class="osname">NetBSD</systemitem>, <systemitem
class="osname">OpenBSD</systemitem>, and
@@ -2137,7 +2136,7 @@ export MANPATH
<para>
<productname>PostgreSQL</productname> can be expected to work on these operating
systems: Linux (all recent distributions), Windows (XP and later),
- FreeBSD, OpenBSD, NetBSD, macOS, AIX, HP/UX, and Solaris.
+ FreeBSD, OpenBSD, NetBSD, macOS, AIX, and Solaris.
Other Unix-like systems may also work but are not currently
being tested. In most cases, all CPU architectures supported by
a given operating system will work. Look in
diff --git a/doc/src/sgml/regress.sgml b/doc/src/sgml/regress.sgml
index 952139fc60..8f032c4e7a 100644
--- a/doc/src/sgml/regress.sgml
+++ b/doc/src/sgml/regress.sgml
@@ -689,13 +689,13 @@ testname:output:platformpattern=comparisonfilename
Therefore, we provide a variant comparison file,
<filename>float4-misrounded-input.out</filename>, which includes
the results to be expected on these systems. To silence the bogus
- <quote>failure</quote> message on <systemitem>HP-UX 10</systemitem>
+ <quote>failure</quote> message on <systemitem>Cygwin</systemitem>
platforms, <filename>resultmap</filename> includes:
<programlisting>
-float4:out:hppa.*-hp-hpux10.*=float4-misrounded-input.out
+float4:out:.*-.*-cygwin.*=float4-misrounded-input.out
</programlisting>
which will trigger on any machine where the output of
- <command>config.guess</command> matches <literal>hppa.*-hp-hpux10.*</literal>.
+ <command>config.guess</command> matches <literal>.*-.*-cygwin.*</literal>.
Other lines in <filename>resultmap</filename> select the variant comparison
file for other platforms where it's appropriate.
</para>
diff --git a/doc/src/sgml/runtime.sgml b/doc/src/sgml/runtime.sgml
index 2352389ab6..92a1ea87d8 100644
--- a/doc/src/sgml/runtime.sgml
+++ b/doc/src/sgml/runtime.sgml
@@ -1018,25 +1018,6 @@ psql: error: connection to server on socket "/tmp/.s.PGSQL.5432" failed: No such
</listitem>
</varlistentry>
- <varlistentry>
- <term><systemitem class="osname">HP-UX</systemitem>
- <indexterm><primary>HP-UX</primary><secondary>IPC configuration</secondary></indexterm>
- </term>
- <listitem>
- <para>
- The default settings tend to suffice for normal installations.
- </para>
- <para>
- <acronym>IPC</acronym> parameters can be set in the <application>System
- Administration Manager</application> (<acronym>SAM</acronym>) under
- <menuchoice><guimenu>Kernel
- Configuration</guimenu><guimenuitem>Configurable Parameters</guimenuitem></menuchoice>. Choose
- <guibutton>Create A New Kernel</guibutton> when you're done.
- </para>
- </listitem>
- </varlistentry>
-
-
<varlistentry>
<term><systemitem class="osname">Linux</systemitem>
<indexterm><primary>Linux</primary><secondary>IPC configuration</secondary></indexterm>
diff --git a/src/Makefile.shlib b/src/Makefile.shlib
index 551023c6fb..a7606bc5d9 100644
--- a/src/Makefile.shlib
+++ b/src/Makefile.shlib
@@ -177,39 +177,6 @@ ifeq ($(PORTNAME), netbsd)
endif
endif
-ifeq ($(PORTNAME), hpux)
- ifdef SO_MAJOR_VERSION
- shlib = lib$(NAME)$(DLSUFFIX).$(SO_MAJOR_VERSION)
- endif
- ifeq ($(with_gnu_ld), yes)
- LINK.shared = $(CC) -shared -Wl,-Bsymbolic
- ifdef soname
- LINK.shared += -Wl,-h -Wl,$(soname)
- endif
- else
- LINK.shared = $(LD) -b -Bsymbolic
- ifdef soname
- LINK.shared += +h $(soname)
- endif
- # can't use the CC-syntax rpath pattern here, so instead:
- rpath =
- ifeq ($(enable_rpath), yes)
- LINK.shared += +s +b '$(rpathdir)'
- endif
- # On HPUX platforms, gcc is usually configured to search for libraries
- # in /usr/local/lib, but ld won't do so. Add an explicit -L switch so
- # ld can find the same libraries gcc does. Make sure it goes after any
- # -L switches provided explicitly.
- ifeq ($(GCC), yes)
- SHLIB_LINK += -L/usr/local/lib
- endif
- endif
- # And we need to link with libgcc, too
- ifeq ($(GCC), yes)
- SHLIB_LINK += `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- endif
-endif
-
ifeq ($(PORTNAME), linux)
LINK.shared = $(COMPILER) -shared
ifdef soname
diff --git a/src/backend/libpq/ifaddr.c b/src/backend/libpq/ifaddr.c
index a41808aff0..5494c9b303 100644
--- a/src/backend/libpq/ifaddr.c
+++ b/src/backend/libpq/ifaddr.c
@@ -333,17 +333,11 @@ pg_foreach_ifaddr(PgIfAddrCallback callback, void *cb_data)
#endif
/*
- * SIOCGIFCONF does not return IPv6 addresses on Solaris
- * and HP/UX. So we prefer SIOCGLIFCONF if it's available.
- *
- * On HP/UX, however, it *only* returns IPv6 addresses,
- * and the structs are named slightly differently too.
- * We'd have to do another call with SIOCGIFCONF to get the
- * IPv4 addresses as well. We don't currently bother, just
- * fall back to SIOCGIFCONF on HP/UX.
+ * SIOCGIFCONF does not return IPv6 addresses on Solaris.
+ * So we prefer SIOCGLIFCONF if it's available.
*/
-#if defined(SIOCGLIFCONF) && !defined(__hpux)
+#if defined(SIOCGLIFCONF)
/*
* Enumerate the system's network interface addresses and call the callback
diff --git a/src/backend/port/hpux/tas.c.template b/src/backend/port/hpux/tas.c.template
deleted file mode 100644
index 5ccbbcde9a..0000000000
--- a/src/backend/port/hpux/tas.c.template
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * tas() for HPPA.
- *
- * To generate tas.s using this template:
- * 1. cc +O2 -S -c tas.c
- * 2. edit tas.s:
- * - replace the LDW with LDCWX
- * 3. install as src/backend/port/tas/hpux_hppa.s.
- *
- * For details about the LDCWX instruction, see the "Precision
- * Architecture and Instruction Reference Manual" (09740-90014 of June
- * 1987), p. 5-38.
- */
-
-int
-tas(lock)
- int *lock; /* LDCWX is a word instruction */
-{
- /*
- * LDCWX requires that we align the "semaphore" to a 16-byte
- * boundary. The actual datum is a single word (4 bytes).
- */
- lock = ((uintptr_t) lock + 15) & ~15;
-
- /*
- * The LDCWX instruction atomically clears the target word and
- * returns the previous value. Hence, if the instruction returns
- * 0, someone else has already acquired the lock before we tested
- * it (i.e., we have failed).
- *
- * Notice that this means that we actually clear the word to set
- * the lock and set the word to clear the lock. This is the
- * opposite behavior from the SPARC LDSTUB instruction. For some
- * reason everything that H-P does is rather baroque...
- */
- if (*lock) { /* this generates the LDW */
- return(0); /* success */
- }
- return(1); /* failure */
-}
diff --git a/src/backend/port/tas/hpux_hppa.s b/src/backend/port/tas/hpux_hppa.s
deleted file mode 100644
index d978a7cb03..0000000000
--- a/src/backend/port/tas/hpux_hppa.s
+++ /dev/null
@@ -1,28 +0,0 @@
-
- .SPACE $TEXT$,SORT=8
- .SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=44,CODE_ONLY,SORT=24
-tas
- .PROC
- .CALLINFO CALLER,FRAME=0,ENTRY_SR=3
- .ENTRY
- LDO 15(%r26),%r31 ;offset 0x0
- DEPI 0,31,4,%r31 ;offset 0x4
- LDCWX 0(0,%r31),%r23 ;offset 0x8
- COMICLR,= 0,%r23,%r0 ;offset 0xc
- DEP,TR %r0,31,32,%r28 ;offset 0x10
-$00000001
- LDI 1,%r28 ;offset 0x14
-$L0
- .EXIT
- BV,N %r0(%r2) ;offset 0x18
- .PROCEND ;in=26;out=28;
-
-
- .SPACE $TEXT$
- .SUBSPA $CODE$
- .SPACE $PRIVATE$,SORT=16
- .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=16
- .SPACE $TEXT$
- .SUBSPA $CODE$
- .EXPORT tas,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR
- .END
diff --git a/src/backend/tcop/postgres.c b/src/backend/tcop/postgres.c
index 495cbf2006..731ced0a73 100644
--- a/src/backend/tcop/postgres.c
+++ b/src/backend/tcop/postgres.c
@@ -132,13 +132,6 @@ static long max_stack_depth_bytes = 100 * 1024L;
*/
static char *stack_base_ptr = NULL;
-/*
- * On IA64 we also have to remember the register stack base.
- */
-#if defined(__ia64__) || defined(__ia64)
-static char *register_stack_base_ptr = NULL;
-#endif
-
/*
* Flag to keep track of whether we have started a transaction.
* For extended query protocol this has to be remembered across messages.
@@ -3390,44 +3383,6 @@ ProcessInterrupts(void)
}
-/*
- * IA64-specific code to fetch the AR.BSP register for stack depth checks.
- *
- * We currently support gcc, icc, and HP-UX's native compiler here.
- *
- * Note: while icc accepts gcc asm blocks on x86[_64], this is not true on
- * ia64 (at least not in icc versions before 12.x). So we have to carry a
- * separate implementation for it.
- */
-#if defined(__ia64__) || defined(__ia64)
-
-#if defined(__hpux) && !defined(__GNUC__) && !defined(__INTEL_COMPILER)
-/* Assume it's HP-UX native compiler */
-#include <ia64/sys/inline.h>
-#define ia64_get_bsp() ((char *) (_Asm_mov_from_ar(_AREG_BSP, _NO_FENCE)))
-#elif defined(__INTEL_COMPILER)
-/* icc */
-#include <asm/ia64regs.h>
-#define ia64_get_bsp() ((char *) __getReg(_IA64_REG_AR_BSP))
-#else
-/* gcc */
-static __inline__ char *
-ia64_get_bsp(void)
-{
- char *ret;
-
- /* the ;; is a "stop", seems to be required before fetching BSP */
- __asm__ __volatile__(
- ";;\n"
- " mov %0=ar.bsp \n"
-: "=r"(ret));
-
- return ret;
-}
-#endif
-#endif /* IA64 */
-
-
/*
* set_stack_base: set up reference point for stack depth checking
*
@@ -3441,12 +3396,7 @@ set_stack_base(void)
#endif
pg_stack_base_t old;
-#if defined(__ia64__) || defined(__ia64)
- old.stack_base_ptr = stack_base_ptr;
- old.register_stack_base_ptr = register_stack_base_ptr;
-#else
old = stack_base_ptr;
-#endif
/*
* Set up reference point for stack depth checking. On recent gcc we use
@@ -3458,9 +3408,6 @@ set_stack_base(void)
#else
stack_base_ptr = &stack_base;
#endif
-#if defined(__ia64__) || defined(__ia64)
- register_stack_base_ptr = ia64_get_bsp();
-#endif
return old;
}
@@ -3477,12 +3424,7 @@ set_stack_base(void)
void
restore_stack_base(pg_stack_base_t base)
{
-#if defined(__ia64__) || defined(__ia64)
- stack_base_ptr = base.stack_base_ptr;
- register_stack_base_ptr = base.register_stack_base_ptr;
-#else
stack_base_ptr = base;
-#endif
}
/*
@@ -3539,22 +3481,6 @@ stack_is_too_deep(void)
stack_base_ptr != NULL)
return true;
- /*
- * On IA64 there is a separate "register" stack that requires its own
- * independent check. For this, we have to measure the change in the
- * "BSP" pointer from PostgresMain to here. Logic is just as above,
- * except that we know IA64's register stack grows up.
- *
- * Note we assume that the same max_stack_depth applies to both stacks.
- */
-#if defined(__ia64__) || defined(__ia64)
- stack_depth = (long) (ia64_get_bsp() - register_stack_base_ptr);
-
- if (stack_depth > max_stack_depth_bytes &&
- register_stack_base_ptr != NULL)
- return true;
-#endif /* IA64 */
-
return false;
}
diff --git a/src/backend/utils/misc/ps_status.c b/src/backend/utils/misc/ps_status.c
index ec314c03f5..8520ce76bb 100644
--- a/src/backend/utils/misc/ps_status.c
+++ b/src/backend/utils/misc/ps_status.c
@@ -15,9 +15,6 @@
#include "postgres.h"
#include <unistd.h>
-#ifdef HAVE_SYS_PSTAT_H
-#include <sys/pstat.h> /* for HP-UX */
-#endif
#ifdef HAVE_PS_STRINGS
#include <machine/vmparam.h> /* for old BSD */
#include <sys/exec.h>
@@ -45,9 +42,6 @@ bool update_process_title = true;
* PS_USE_SETPROCTITLE
* use the function setproctitle(const char *, ...)
* (newer BSD systems)
- * PS_USE_PSTAT
- * use the pstat(PSTAT_SETCMD, )
- * (HPUX)
* PS_USE_PS_STRINGS
* assign PS_STRINGS->ps_argvstr = "string"
* (some BSD systems)
@@ -67,8 +61,6 @@ bool update_process_title = true;
#define PS_USE_SETPROCTITLE_FAST
#elif defined(HAVE_SETPROCTITLE)
#define PS_USE_SETPROCTITLE
-#elif defined(HAVE_PSTAT) && defined(PSTAT_SETCMD)
-#define PS_USE_PSTAT
#elif defined(HAVE_PS_STRINGS)
#define PS_USE_PS_STRINGS
#elif (defined(BSD) || defined(__hurd__)) && !defined(__darwin__)
@@ -376,15 +368,6 @@ set_ps_display(const char *activity)
setproctitle_fast("%s", ps_buffer);
#endif
-#ifdef PS_USE_PSTAT
- {
- union pstun pst;
-
- pst.pst_command = ps_buffer;
- pstat(PSTAT_SETCMD, pst, ps_buffer_cur_len, 0, 0);
- }
-#endif /* PS_USE_PSTAT */
-
#ifdef PS_USE_PS_STRINGS
PS_STRINGS->ps_nargvstr = 1;
PS_STRINGS->ps_argvstr = ps_buffer;
diff --git a/src/common/sprompt.c b/src/common/sprompt.c
index 8b836846e3..5ad90f59bb 100644
--- a/src/common/sprompt.c
+++ b/src/common/sprompt.c
@@ -90,7 +90,7 @@ simple_prompt_extended(const char *prompt, bool echo,
/*
* Do not try to collapse these into one "w+" mode file. Doesn't work on
- * some platforms (eg, HPUX 10.20).
+ * some platforms.
*/
termin = fopen("/dev/tty", "r");
termout = fopen("/dev/tty", "w");
diff --git a/src/include/miscadmin.h b/src/include/miscadmin.h
index 0af130fbc5..ea9a56d395 100644
--- a/src/include/miscadmin.h
+++ b/src/include/miscadmin.h
@@ -279,15 +279,7 @@ extern PGDLLIMPORT bool VacuumCostActive;
/* in tcop/postgres.c */
-#if defined(__ia64__) || defined(__ia64)
-typedef struct
-{
- char *stack_base_ptr;
- char *register_stack_base_ptr;
-} pg_stack_base_t;
-#else
typedef char *pg_stack_base_t;
-#endif
extern pg_stack_base_t set_stack_base(void);
extern void restore_stack_base(pg_stack_base_t base);
diff --git a/src/include/pg_config.h.in b/src/include/pg_config.h.in
index cdd742cb55..7133c3dc66 100644
--- a/src/include/pg_config.h.in
+++ b/src/include/pg_config.h.in
@@ -430,9 +430,6 @@
/* Define to 1 if you have the `pread' function. */
#undef HAVE_PREAD
-/* Define to 1 if you have the `pstat' function. */
-#undef HAVE_PSTAT
-
/* Define to 1 if the PS_STRINGS thing exists. */
#undef HAVE_PS_STRINGS
@@ -625,9 +622,6 @@
/* Define to 1 if you have the <sys/procctl.h> header file. */
#undef HAVE_SYS_PROCCTL_H
-/* Define to 1 if you have the <sys/pstat.h> header file. */
-#undef HAVE_SYS_PSTAT_H
-
/* Define to 1 if you have the <sys/resource.h> header file. */
#undef HAVE_SYS_RESOURCE_H
diff --git a/src/include/port/atomics.h b/src/include/port/atomics.h
index 9550e04aaa..13e1ecbe01 100644
--- a/src/include/port/atomics.h
+++ b/src/include/port/atomics.h
@@ -68,12 +68,8 @@
#include "port/atomics/arch-arm.h"
#elif defined(__i386__) || defined(__i386) || defined(__x86_64__)
#include "port/atomics/arch-x86.h"
-#elif defined(__ia64__) || defined(__ia64)
-#include "port/atomics/arch-ia64.h"
#elif defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(__powerpc64__)
#include "port/atomics/arch-ppc.h"
-#elif defined(__hppa) || defined(__hppa__)
-#include "port/atomics/arch-hppa.h"
#endif
/*
@@ -95,8 +91,6 @@
#include "port/atomics/generic-gcc.h"
#elif defined(_MSC_VER)
#include "port/atomics/generic-msvc.h"
-#elif defined(__hpux) && defined(__ia64) && !defined(__GNUC__)
-#include "port/atomics/generic-acc.h"
#elif defined(__SUNPRO_C) && !defined(__GNUC__)
#include "port/atomics/generic-sunpro.h"
#else
diff --git a/src/include/port/atomics/arch-hppa.h b/src/include/port/atomics/arch-hppa.h
deleted file mode 100644
index 7a7bb6eab4..0000000000
--- a/src/include/port/atomics/arch-hppa.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * arch-hppa.h
- * Atomic operations considerations specific to HPPA
- *
- * Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * src/include/port/atomics/arch-hppa.h
- *
- *-------------------------------------------------------------------------
- */
-
-/* HPPA doesn't do either read or write reordering */
-#define pg_memory_barrier_impl() pg_compiler_barrier_impl()
diff --git a/src/include/port/atomics/arch-ia64.h b/src/include/port/atomics/arch-ia64.h
deleted file mode 100644
index 771bac1f3e..0000000000
--- a/src/include/port/atomics/arch-ia64.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * arch-ia64.h
- * Atomic operations considerations specific to intel itanium
- *
- * Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * src/include/port/atomics/arch-ia64.h
- *
- *-------------------------------------------------------------------------
- */
-
-/*
- * Itanium is weakly ordered, so read and write barriers require a full
- * fence.
- */
-#if defined(__INTEL_COMPILER)
-# define pg_memory_barrier_impl() __mf()
-#elif defined(__GNUC__)
-# define pg_memory_barrier_impl() __asm__ __volatile__ ("mf" : : : "memory")
-#elif defined(__hpux)
-# define pg_memory_barrier_impl() _Asm_mf()
-#endif
-
-/* per architecture manual doubleword accesses have single copy atomicity */
-#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY
diff --git a/src/include/port/atomics/fallback.h b/src/include/port/atomics/fallback.h
index 1cdef5f2f6..45f107469e 100644
--- a/src/include/port/atomics/fallback.h
+++ b/src/include/port/atomics/fallback.h
@@ -75,11 +75,7 @@ typedef struct pg_atomic_flag
* be content with just one byte instead of 4, but that's not too much
* waste.
*/
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
- int sema[4];
-#else
int sema;
-#endif
volatile bool value;
} pg_atomic_flag;
@@ -93,11 +89,7 @@ typedef struct pg_atomic_flag
typedef struct pg_atomic_uint32
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
- int sema[4];
-#else
int sema;
-#endif
volatile uint32 value;
} pg_atomic_uint32;
@@ -111,11 +103,7 @@ typedef struct pg_atomic_uint32
typedef struct pg_atomic_uint64
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
- int sema[4];
-#else
int sema;
-#endif
volatile uint64 value;
} pg_atomic_uint64;
diff --git a/src/include/port/atomics/generic-acc.h b/src/include/port/atomics/generic-acc.h
deleted file mode 100644
index 842b2dec6e..0000000000
--- a/src/include/port/atomics/generic-acc.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * generic-acc.h
- * Atomic operations support when using HPs acc on HPUX
- *
- * Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * Documentation:
- * * inline assembly for Itanium-based HP-UX:
- * http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/inline_assem_ERS.pdf
- * * Implementing Spinlocks on the Intel (R) Itanium (R) Architecture and PA-RISC
- * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
- *
- * Itanium only supports a small set of numbers (6, -8, -4, -1, 1, 4, 8, 16)
- * for atomic add/sub, so we just implement everything but compare_exchange
- * via the compare_exchange fallbacks in atomics/generic.h.
- *
- * src/include/port/atomics/generic-acc.h
- *
- * -------------------------------------------------------------------------
- */
-
-#include <machine/sys/inline.h>
-
-#define pg_compiler_barrier_impl() _Asm_sched_fence()
-
-#if defined(HAVE_ATOMICS)
-
-/* IA64 always has 32/64 bit atomics */
-
-#define PG_HAVE_ATOMIC_U32_SUPPORT
-typedef struct pg_atomic_uint32
-{
- volatile uint32 value;
-} pg_atomic_uint32;
-
-#define PG_HAVE_ATOMIC_U64_SUPPORT
-typedef struct pg_atomic_uint64
-{
- /*
- * Alignment is guaranteed to be 64bit. Search for "Well-behaved
- * application restrictions" => "Data alignment and data sharing" on HP's
- * website. Unfortunately the URL doesn't seem to stable enough to
- * include.
- */
- volatile uint64 value;
-} pg_atomic_uint64;
-
-
-#define MINOR_FENCE (_Asm_fence) (_UP_CALL_FENCE | _UP_SYS_FENCE | \
- _DOWN_CALL_FENCE | _DOWN_SYS_FENCE )
-
-#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U32
-static inline bool
-pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
- uint32 *expected, uint32 newval)
-{
- bool ret;
- uint32 current;
-
- _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
- /*
- * We want a barrier, not just release/acquire semantics.
- */
- _Asm_mf();
- /*
- * Notes:
- * _DOWN_MEM_FENCE | _UP_MEM_FENCE prevents reordering by the compiler
- */
- current = _Asm_cmpxchg(_SZ_W, /* word */
- _SEM_REL,
- &ptr->value,
- newval, _LDHINT_NONE,
- _DOWN_MEM_FENCE | _UP_MEM_FENCE);
- ret = current == *expected;
- *expected = current;
- return ret;
-}
-
-
-#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U64
-static inline bool
-pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr,
- uint64 *expected, uint64 newval)
-{
- bool ret;
- uint64 current;
-
- _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
- _Asm_mf();
- current = _Asm_cmpxchg(_SZ_D, /* doubleword */
- _SEM_REL,
- &ptr->value,
- newval, _LDHINT_NONE,
- _DOWN_MEM_FENCE | _UP_MEM_FENCE);
- ret = current == *expected;
- *expected = current;
- return ret;
-}
-
-#undef MINOR_FENCE
-
-#endif /* defined(HAVE_ATOMICS) */
diff --git a/src/include/port/hpux.h b/src/include/port/hpux.h
deleted file mode 100644
index 4d1dcea70c..0000000000
--- a/src/include/port/hpux.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* src/include/port/hpux.h */
-
-/* nothing needed */
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 98b4d718d2..08421cc240 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -250,71 +250,6 @@ spin_delay(void)
#endif /* __x86_64__ */
-#if defined(__ia64__) || defined(__ia64)
-/*
- * Intel Itanium, gcc or Intel's compiler.
- *
- * Itanium has weak memory ordering, but we rely on the compiler to enforce
- * strict ordering of accesses to volatile data. In particular, while the
- * xchg instruction implicitly acts as a memory barrier with 'acquire'
- * semantics, we do not have an explicit memory fence instruction in the
- * S_UNLOCK macro. We use a regular assignment to clear the spinlock, and
- * trust that the compiler marks the generated store instruction with the
- * ".rel" opcode.
- *
- * Testing shows that assumption to hold on gcc, although I could not find
- * any explicit statement on that in the gcc manual. In Intel's compiler,
- * the -m[no-]serialize-volatile option controls that, and testing shows that
- * it is enabled by default.
- *
- * While icc accepts gcc asm blocks on x86[_64], this is not true on ia64
- * (at least not in icc versions before 12.x). So we have to carry a separate
- * compiler-intrinsic-based implementation for it.
- */
-#define HAS_TEST_AND_SET
-
-typedef unsigned int slock_t;
-
-#define TAS(lock) tas(lock)
-
-/* On IA64, it's a win to use a non-locking test before the xchg proper */
-#define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))
-
-#ifndef __INTEL_COMPILER
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- long int ret;
-
- __asm__ __volatile__(
- " xchg4 %0=%1,%2 \n"
-: "=r"(ret), "+m"(*lock)
-: "r"(1)
-: "memory");
- return (int) ret;
-}
-
-#else /* __INTEL_COMPILER */
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- int ret;
-
- ret = _InterlockedExchange(lock,1); /* this is a xchg asm macro */
-
- return ret;
-}
-
-/* icc can't use the regular gcc S_UNLOCK() macro either in this case */
-#define S_UNLOCK(lock) \
- do { __memory_barrier(); *(lock) = 0; } while (0)
-
-#endif /* __INTEL_COMPILER */
-#endif /* __ia64__ || __ia64 */
-
-
/*
* On ARM and ARM64, we use __sync_lock_test_and_set(int *, int) if available.
*
@@ -792,101 +727,6 @@ typedef unsigned char slock_t;
#if !defined(HAS_TEST_AND_SET) /* We didn't trigger above, let's try here */
-
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
-/*
- * HP's PA-RISC
- *
- * See src/backend/port/hpux/tas.c.template for details about LDCWX. Because
- * LDCWX requires a 16-byte-aligned address, we declare slock_t as a 16-byte
- * struct. The active word in the struct is whichever has the aligned address;
- * the other three words just sit at -1.
- *
- * When using gcc, we can inline the required assembly code.
- */
-#define HAS_TEST_AND_SET
-
-typedef struct
-{
- int sema[4];
-} slock_t;
-
-#define TAS_ACTIVE_WORD(lock) ((volatile int *) (((uintptr_t) (lock) + 15) & ~15))
-
-#if defined(__GNUC__)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- volatile int *lockword = TAS_ACTIVE_WORD(lock);
- register int lockval;
-
- __asm__ __volatile__(
- " ldcwx 0(0,%2),%0 \n"
-: "=r"(lockval), "+m"(*lockword)
-: "r"(lockword)
-: "memory");
- return (lockval == 0);
-}
-
-/*
- * The hppa implementation doesn't follow the rules of this files and provides
- * a gcc specific implementation outside of the above defined(__GNUC__). It
- * does so to avoid duplication between the HP compiler and gcc. So undefine
- * the generic fallback S_UNLOCK from above.
- */
-#ifdef S_UNLOCK
-#undef S_UNLOCK
-#endif
-#define S_UNLOCK(lock) \
- do { \
- __asm__ __volatile__("" : : : "memory"); \
- *TAS_ACTIVE_WORD(lock) = -1; \
- } while (0)
-
-#endif /* __GNUC__ */
-
-#define S_INIT_LOCK(lock) \
- do { \
- volatile slock_t *lock_ = (lock); \
- lock_->sema[0] = -1; \
- lock_->sema[1] = -1; \
- lock_->sema[2] = -1; \
- lock_->sema[3] = -1; \
- } while (0)
-
-#define S_LOCK_FREE(lock) (*TAS_ACTIVE_WORD(lock) != 0)
-
-#endif /* __hppa || __hppa__ */
-
-
-#if defined(__hpux) && defined(__ia64) && !defined(__GNUC__)
-/*
- * HP-UX on Itanium, non-gcc/icc compiler
- *
- * We assume that the compiler enforces strict ordering of loads/stores on
- * volatile data (see comments on the gcc-version earlier in this file).
- * Note that this assumption does *not* hold if you use the
- * +Ovolatile=__unordered option on the HP-UX compiler, so don't do that.
- *
- * See also Implementing Spinlocks on the Intel Itanium Architecture and
- * PA-RISC, by Tor Ekqvist and David Graves, for more information. As of
- * this writing, version 1.0 of the manual is available at:
- * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
- */
-#define HAS_TEST_AND_SET
-
-typedef unsigned int slock_t;
-
-#include <ia64/sys/inline.h>
-#define TAS(lock) _Asm_xchg(_SZ_W, lock, 1, _LDHINT_NONE)
-/* On IA64, it's a win to use a non-locking test before the xchg proper */
-#define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))
-#define S_UNLOCK(lock) \
- do { _Asm_mf(); (*(lock)) = 0; } while (0)
-
-#endif /* HPUX on IA64, non gcc/icc */
-
#if defined(_AIX) /* AIX */
/*
* AIX (POWER)
diff --git a/src/makefiles/Makefile.hpux b/src/makefiles/Makefile.hpux
deleted file mode 100644
index 25e036bd8d..0000000000
--- a/src/makefiles/Makefile.hpux
+++ /dev/null
@@ -1,47 +0,0 @@
-# Using X/Open Networking Interfaces requires to link with libxnet.
-# Without specifying this, bind(), getpeername() and so on don't work
-# correctly in the LP64 data model.
-LIBS := -lxnet $(LIBS)
-
-# Set up rpath so that the executables don't need SHLIB_PATH to be set.
-# (Note: --disable-rpath is a really bad idea on this platform...)
-ifeq ($(with_gnu_ld), yes)
- rpath = -Wl,-rpath -Wl,'$(rpathdir)'
-else
- rpath = -Wl,+b -Wl,'$(rpathdir)'
-endif
-
-# catch null pointer dereferences
-ifeq ($(with_gnu_ld), yes)
-# XXX what to put here?
-else
- LDFLAGS_EX += -Wl,-z
-endif
-
-# set up appropriate options for shared library builds
-export_dynamic = -Wl,-E
-
-INSTALL_SHLIB_OPTS = -m 555
-
-AROPT = crs
-
-# env var name to use in place of LD_LIBRARY_PATH
-ld_library_path_var = SHLIB_PATH
-
-# Rule for building a shared library from a single .o file
-%$(DLSUFFIX): %.o
-ifeq ($(GCC), yes)
- ifeq ($(with_gnu_ld), yes)
- $(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@ `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- else
- $(LD) -b -o $@ $< `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- endif
-else
- ifeq ($(with_gnu_ld), yes)
- $(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@
- else
- $(LD) -b -o $@ $<
- endif
-endif
-
-sqlmansect = 5
diff --git a/src/pl/plperl/ppport.h b/src/pl/plperl/ppport.h
index 1f6cf465df..762dd362b3 100644
--- a/src/pl/plperl/ppport.h
+++ b/src/pl/plperl/ppport.h
@@ -12160,7 +12160,7 @@ DPPP_(my_newCONSTSUB)(HV *stash, const char *name, SV *sv)
STMT_START { \
ASSUME(!"UNREACHABLE"); __builtin_unreachable(); \
} STMT_END
-# elif ! defined(__GNUC__) && (defined(__sun) || defined(__hpux))
+# elif ! defined(__GNUC__) && defined(__sun)
# define NOT_REACHED
# else
# define NOT_REACHED ASSUME(!"UNREACHABLE")
diff --git a/src/port/dlopen.c b/src/port/dlopen.c
index d441dc8196..6ff9f4bf64 100644
--- a/src/port/dlopen.c
+++ b/src/port/dlopen.c
@@ -15,55 +15,7 @@
#include "c.h"
-#if defined(__hpux)
-
-/* System includes */
-#include <a.out.h>
-#include <dl.h>
-
-void *
-dlopen(const char *file, int mode)
-{
- int flags = 0;
-
- if (mode & RTLD_NOW)
- flags |= BIND_IMMEDIATE;
-#ifdef NOT_USED
- if (mode & RTLD_LAZY)
- flags |= BIND_DEFERRED;
-#endif
-
- return shl_load(file, flags | BIND_VERBOSE, 0L);
-}
-
-void *
-dlsym(void *handle, const char *symbol)
-{
- void *value;
-
- if (shl_findsym((shl_t *) & handle, symbol, TYPE_PROCEDURE, &value) == -1)
- return NULL;
- return value;
-}
-
-int
-dlclose(void *handle)
-{
- return shl_unload((shl_t) handle);
-}
-
-char *
-dlerror(void)
-{
- static char errmsg[] = "shl_load failed";
-
- if (errno)
- return strerror(errno);
-
- return errmsg;
-}
-
-#elif defined(WIN32)
+#if defined(WIN32)
static char last_dyn_error[512];
diff --git a/src/port/getrusage.c b/src/port/getrusage.c
index 8369fd2793..02665f4032 100644
--- a/src/port/getrusage.c
+++ b/src/port/getrusage.c
@@ -20,7 +20,6 @@
/* This code works on:
* solaris_i386
* solaris_sparc
- * hpux 9.*
* win32
* which currently is all the supported platforms that don't have a
* native version of getrusage(). So, if configure decides to compile
diff --git a/src/template/hpux b/src/template/hpux
deleted file mode 100644
index 5105a74c78..0000000000
--- a/src/template/hpux
+++ /dev/null
@@ -1,34 +0,0 @@
-# src/template/hpux
-
-# Need this for access to many modern library features
-CPPFLAGS="$CPPFLAGS -D_XOPEN_SOURCE_EXTENDED"
-
-# HP's compiler likes the spelling +O2 not -O2, so adjust default CFLAGS
-if test "$GCC" != yes ; then
- CFLAGS="+O2"
-fi
-
-# Extra CFLAGS for code that will go into a shared library
-if test "$GCC" = yes ; then
- CFLAGS_SL="-fPIC"
-else
- CFLAGS_SL="+Z"
-fi
-
-# Pick right test-and-set (TAS) code. We need out-of-line assembler
-# when not using gcc.
-case $host in
- hppa*-*-hpux*)
- if test "$GCC" != yes ; then
- need_tas=yes
- tas_file=hpux_hppa.s
- fi
- ;;
-esac
-
-case $host_cpu in
- ia64)
- DLSUFFIX=".so";;
- *)
- DLSUFFIX=".sl";;
-esac
diff --git a/src/test/regress/resultmap b/src/test/regress/resultmap
index c766d03df2..8a3ed50585 100644
--- a/src/test/regress/resultmap
+++ b/src/test/regress/resultmap
@@ -1,3 +1,2 @@
float4:out:.*-.*-cygwin.*=float4-misrounded-input.out
float4:out:.*-.*-mingw.*=float4-misrounded-input.out
-float4:out:hppa.*-hp-hpux10.*=float4-misrounded-input.out
diff --git a/src/tools/msvc/Solution.pm b/src/tools/msvc/Solution.pm
index d30e8fcb11..52ff56ba83 100644
--- a/src/tools/msvc/Solution.pm
+++ b/src/tools/msvc/Solution.pm
@@ -337,7 +337,6 @@ sub GenerateFiles
HAVE_PPC_LWARX_MUTEX_HINT => undef,
HAVE_PPOLL => undef,
HAVE_PREAD => undef,
- HAVE_PSTAT => undef,
HAVE_PS_STRINGS => undef,
HAVE_PTHREAD => undef,
HAVE_PTHREAD_BARRIER_WAIT => undef,
@@ -401,7 +400,6 @@ sub GenerateFiles
HAVE_SYS_PERSONALITY_H => undef,
HAVE_SYS_PRCTL_H => undef,
HAVE_SYS_PROCCTL_H => undef,
- HAVE_SYS_PSTAT_H => undef,
HAVE_SYS_RESOURCE_H => undef,
HAVE_SYS_SELECT_H => undef,
HAVE_SYS_SEM_H => undef,
diff --git a/src/tools/pginclude/cpluspluscheck b/src/tools/pginclude/cpluspluscheck
index 42688fff53..fa3dff83a1 100755
--- a/src/tools/pginclude/cpluspluscheck
+++ b/src/tools/pginclude/cpluspluscheck
@@ -63,7 +63,6 @@ do
test "$f" = src/include/port/cygwin.h && continue
test "$f" = src/include/port/darwin.h && continue
test "$f" = src/include/port/freebsd.h && continue
- test "$f" = src/include/port/hpux.h && continue
test "$f" = src/include/port/linux.h && continue
test "$f" = src/include/port/netbsd.h && continue
test "$f" = src/include/port/openbsd.h && continue
@@ -81,8 +80,6 @@ do
# Likewise, these files are platform-specific, and the one
# relevant to our platform will be included by atomics.h.
test "$f" = src/include/port/atomics/arch-arm.h && continue
- test "$f" = src/include/port/atomics/arch-hppa.h && continue
- test "$f" = src/include/port/atomics/arch-ia64.h && continue
test "$f" = src/include/port/atomics/arch-ppc.h && continue
test "$f" = src/include/port/atomics/arch-x86.h && continue
test "$f" = src/include/port/atomics/fallback.h && continue
diff --git a/src/tools/pginclude/headerscheck b/src/tools/pginclude/headerscheck
index f8b0674a66..ce9c63cb6d 100755
--- a/src/tools/pginclude/headerscheck
+++ b/src/tools/pginclude/headerscheck
@@ -59,7 +59,6 @@ do
test "$f" = src/include/port/cygwin.h && continue
test "$f" = src/include/port/darwin.h && continue
test "$f" = src/include/port/freebsd.h && continue
- test "$f" = src/include/port/hpux.h && continue
test "$f" = src/include/port/linux.h && continue
test "$f" = src/include/port/netbsd.h && continue
test "$f" = src/include/port/openbsd.h && continue
@@ -77,8 +76,6 @@ do
# Likewise, these files are platform-specific, and the one
# relevant to our platform will be included by atomics.h.
test "$f" = src/include/port/atomics/arch-arm.h && continue
- test "$f" = src/include/port/atomics/arch-hppa.h && continue
- test "$f" = src/include/port/atomics/arch-ia64.h && continue
test "$f" = src/include/port/atomics/arch-ppc.h && continue
test "$f" = src/include/port/atomics/arch-x86.h && continue
test "$f" = src/include/port/atomics/fallback.h && continue
--
2.36.1
Thomas Munro <thomas.munro@gmail.com> writes:
On Mon, Jul 4, 2022 at 12:08 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
I would not stand in the way of dropping HP-UX and IA64 support as of
v16. (I do still feel that HPPA is of interest, to keep us honest
about spinlock support --- but that dual-stack arrangement that IA64
uses is surely not part of anyone's future.)
I tried to find everything relating to HP-UX, aCC, ia64 and hppa. Or
do you still want to keep the hppa bits for NetBSD (I wasn't sure if
your threat to set up a NetBSD/hppa system was affected by the
hardware failure you mentioned)?
No, the hardware failure is that the machine's SCSI controller seems
to be fried, thus internal drives no longer accessible. I have a
working NetBSD-current installation on an external USB drive, and plan
to commission it as a buildfarm animal once NetBSD 10 is officially
branched. It'll be a frankencritter of the first order, because
USB didn't exist when the machine was built, but hey...
regards, tom lane
Hi,
On 2022-07-02 11:33:54 -0700, Andres Freund wrote:
If we decide we want to continue supporting AIX we should bite the bullet and
add a 64bit-int TYPALIGN_*. It might be worth to translate that to bytes when
building tupledescs, so we don't need more branches (reducing them compared to
today).
I just thought an easier way - why don't we introduce a 'catalog_double'
that's defined to be pg_attribute_aligned(whatever-we-need) on AIX? Then we
can get rid of the manually enforced alignedness and we don't need to contort
catalog order.
Greetings,
Andres Freund
Andres Freund <andres@anarazel.de> writes:
I just thought an easier way - why don't we introduce a 'catalog_double'
that's defined to be pg_attribute_aligned(whatever-we-need) on AIX? Then we
can get rid of the manually enforced alignedness and we don't need to contort
catalog order.
Hm, do all the AIX compilers we care about have support for that?
If so, it seems like a great idea.
regards, tom lane
On 05.07.22 07:31, Andres Freund wrote:
On 2022-07-02 11:33:54 -0700, Andres Freund wrote:
If we decide we want to continue supporting AIX we should bite the bullet and
add a 64bit-int TYPALIGN_*. It might be worth to translate that to bytes when
building tupledescs, so we don't need more branches (reducing them compared to
today).I just thought an easier way - why don't we introduce a 'catalog_double'
that's defined to be pg_attribute_aligned(whatever-we-need) on AIX? Then we
can get rid of the manually enforced alignedness and we don't need to contort
catalog order.
Isn't the problem that on AIX, double and int64 have different alignment
requirements, and we just check the one for double and apply it to
int64? That ought to be fixable by two separate alignment checks in
configure and a new alignment letter for pg_type.
Hi,
On 2022-07-05 01:36:24 -0400, Tom Lane wrote:
Andres Freund <andres@anarazel.de> writes:
I just thought an easier way - why don't we introduce a 'catalog_double'
that's defined to be pg_attribute_aligned(whatever-we-need) on AIX? Then we
can get rid of the manually enforced alignedness and we don't need to contort
catalog order.Hm, do all the AIX compilers we care about have support for that?
If so, it seems like a great idea.
Afaics we support xlc and gcc on AIX, and we enable the attribute for both
already. So, I think they do.
Greetings,
Andres Freund
Hi,
On 2022-07-05 08:13:21 +0200, Peter Eisentraut wrote:
On 05.07.22 07:31, Andres Freund wrote:
On 2022-07-02 11:33:54 -0700, Andres Freund wrote:
If we decide we want to continue supporting AIX we should bite the bullet and
add a 64bit-int TYPALIGN_*. It might be worth to translate that to bytes when
building tupledescs, so we don't need more branches (reducing them compared to
today).I just thought an easier way - why don't we introduce a 'catalog_double'
that's defined to be pg_attribute_aligned(whatever-we-need) on AIX? Then we
can get rid of the manually enforced alignedness and we don't need to contort
catalog order.Isn't the problem that on AIX, double and int64 have different alignment
requirements, and we just check the one for double and apply it to int64?
That ought to be fixable by two separate alignment checks in configure and a
new alignment letter for pg_type.
Except that that's quite a bit of work to get right, particularly without
regressing the performance on all platforms. The attalign switches during
tuple deforming are already quite hot.
Greetings,
Andres Freund
On Tue, Jul 5, 2022 at 4:53 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
Thomas Munro <thomas.munro@gmail.com> writes:
On Mon, Jul 4, 2022 at 12:08 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
I would not stand in the way of dropping HP-UX and IA64 support as of
v16. (I do still feel that HPPA is of interest, to keep us honest
about spinlock support --- but that dual-stack arrangement that IA64
uses is surely not part of anyone's future.)I tried to find everything relating to HP-UX, aCC, ia64 and hppa. Or
do you still want to keep the hppa bits for NetBSD (I wasn't sure if
your threat to set up a NetBSD/hppa system was affected by the
hardware failure you mentioned)?No, the hardware failure is that the machine's SCSI controller seems
to be fried, thus internal drives no longer accessible. I have a
working NetBSD-current installation on an external USB drive, and plan
to commission it as a buildfarm animal once NetBSD 10 is officially
branched. It'll be a frankencritter of the first order, because
USB didn't exist when the machine was built, but hey...
OK, here's a new attempt, this time leaving the hppa bits in. The
main tricksy bit is where s_lock.h is simplified a bit by moving the
fully inline GCC-only hppa support up a bit (it was handled a bit
weirdly with some #undef jiggery-pokery before to share stuff between
aCC and GCC), making the diff a little hard to follow. Does this make
sense? It might also be possible to drop one of __hppa and __hppa__
where they are both tested (not clear to me if that is an aCC/GCC
thing). I have no idea if this'll actually work (or ever worked) on
NetBSD/hppa... if it comes to it I could try to boot it under
qemu-system-hppa if that's what it takes, but it may be easy for you
to test...
Attachments:
v2-0001-Remove-HP-UX-aCC-and-ia64-support.patchtext/x-patch; charset=US-ASCII; name=v2-0001-Remove-HP-UX-aCC-and-ia64-support.patchDownload
From 58e3974b15ce5a6325630252f5306e77528d2b1f Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Mon, 4 Jul 2022 16:24:16 +1200
Subject: [PATCH v2] Remove HP-UX, aCC and ia64 support.
HP-UX hardware is no longer produced. This removes support for:
* HP-UX, the operating system.
* HP aCC, the compiler.
* HP/Intel Itanium (ia64), the CPU architecture discontinued in 2021.
Support for HP PA-RISC (hppa), the CPU architecture discontinued in
2008, remains in the tree for now to support potential use on NetBSD.
---
configure | 99 +---------------
configure.ac | 8 --
doc/src/sgml/dfunc.sgml | 29 -----
doc/src/sgml/installation.sgml | 3 +-
doc/src/sgml/regress.sgml | 6 +-
doc/src/sgml/runtime.sgml | 19 ---
src/Makefile.shlib | 33 ------
src/backend/libpq/ifaddr.c | 12 +-
src/backend/port/hpux/tas.c.template | 40 -------
src/backend/port/tas/hpux_hppa.s | 28 -----
src/backend/tcop/postgres.c | 74 ------------
src/backend/utils/misc/ps_status.c | 17 ---
src/common/sprompt.c | 2 +-
src/include/miscadmin.h | 8 --
src/include/pg_config.h.in | 6 -
src/include/port/atomics.h | 4 -
src/include/port/atomics/arch-ia64.h | 29 -----
src/include/port/atomics/fallback.h | 4 +-
src/include/port/atomics/generic-acc.h | 106 -----------------
src/include/port/hpux.h | 3 -
src/include/storage/s_lock.h | 155 ++++---------------------
src/makefiles/Makefile.hpux | 47 --------
src/port/dlopen.c | 50 +-------
src/port/getrusage.c | 1 -
src/template/hpux | 34 ------
src/test/regress/resultmap | 1 -
src/tools/msvc/Solution.pm | 2 -
src/tools/pginclude/cpluspluscheck | 2 -
src/tools/pginclude/headerscheck | 2 -
29 files changed, 36 insertions(+), 788 deletions(-)
delete mode 100644 src/backend/port/hpux/tas.c.template
delete mode 100644 src/backend/port/tas/hpux_hppa.s
delete mode 100644 src/include/port/atomics/arch-ia64.h
delete mode 100644 src/include/port/atomics/generic-acc.h
delete mode 100644 src/include/port/hpux.h
delete mode 100644 src/makefiles/Makefile.hpux
delete mode 100644 src/template/hpux
diff --git a/configure b/configure
index fb07cd27d9..91b7b185f9 100755
--- a/configure
+++ b/configure
@@ -2994,7 +2994,6 @@ case $host_os in
darwin*) template=darwin ;;
dragonfly*) template=netbsd ;;
freebsd*) template=freebsd ;;
- hpux*) template=hpux ;;
linux*|gnu*|k*bsd*-gnu)
template=linux ;;
mingw*) template=win32 ;;
@@ -6856,100 +6855,6 @@ if test x"$pgac_cv_prog_CXX_cxxflags__qlonglong" = x"yes"; then
fi
-elif test "$PORTNAME" = "hpux"; then
- # On some versions of HP-UX, libm functions do not set errno by default.
- # Fix that by using +Olibmerrno if the compiler recognizes it.
-
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${CC} supports +Olibmerrno, for CFLAGS" >&5
-$as_echo_n "checking whether ${CC} supports +Olibmerrno, for CFLAGS... " >&6; }
-if ${pgac_cv_prog_CC_cflags_pOlibmerrno+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- pgac_save_CFLAGS=$CFLAGS
-pgac_save_CC=$CC
-CC=${CC}
-CFLAGS="${CFLAGS} +Olibmerrno"
-ac_save_c_werror_flag=$ac_c_werror_flag
-ac_c_werror_flag=yes
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-int
-main ()
-{
-
- ;
- return 0;
-}
-_ACEOF
-if ac_fn_c_try_compile "$LINENO"; then :
- pgac_cv_prog_CC_cflags_pOlibmerrno=yes
-else
- pgac_cv_prog_CC_cflags_pOlibmerrno=no
-fi
-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
-ac_c_werror_flag=$ac_save_c_werror_flag
-CFLAGS="$pgac_save_CFLAGS"
-CC="$pgac_save_CC"
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_prog_CC_cflags_pOlibmerrno" >&5
-$as_echo "$pgac_cv_prog_CC_cflags_pOlibmerrno" >&6; }
-if test x"$pgac_cv_prog_CC_cflags_pOlibmerrno" = x"yes"; then
- CFLAGS="${CFLAGS} +Olibmerrno"
-fi
-
-
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${CXX} supports +Olibmerrno, for CXXFLAGS" >&5
-$as_echo_n "checking whether ${CXX} supports +Olibmerrno, for CXXFLAGS... " >&6; }
-if ${pgac_cv_prog_CXX_cxxflags_pOlibmerrno+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- pgac_save_CXXFLAGS=$CXXFLAGS
-pgac_save_CXX=$CXX
-CXX=${CXX}
-CXXFLAGS="${CXXFLAGS} +Olibmerrno"
-ac_save_cxx_werror_flag=$ac_cxx_werror_flag
-ac_cxx_werror_flag=yes
-ac_ext=cpp
-ac_cpp='$CXXCPP $CPPFLAGS'
-ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
-
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-int
-main ()
-{
-
- ;
- return 0;
-}
-_ACEOF
-if ac_fn_cxx_try_compile "$LINENO"; then :
- pgac_cv_prog_CXX_cxxflags_pOlibmerrno=yes
-else
- pgac_cv_prog_CXX_cxxflags_pOlibmerrno=no
-fi
-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
-ac_ext=c
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_c_compiler_gnu
-
-ac_cxx_werror_flag=$ac_save_cxx_werror_flag
-CXXFLAGS="$pgac_save_CXXFLAGS"
-CXX="$pgac_save_CXX"
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_prog_CXX_cxxflags_pOlibmerrno" >&5
-$as_echo "$pgac_cv_prog_CXX_cxxflags_pOlibmerrno" >&6; }
-if test x"$pgac_cv_prog_CXX_cxxflags_pOlibmerrno" = x"yes"; then
- CXXFLAGS="${CXXFLAGS} +Olibmerrno"
-fi
-
-
fi
@@ -13823,7 +13728,7 @@ $as_echo "#define HAVE_STDBOOL_H 1" >>confdefs.h
fi
-for ac_header in atomic.h copyfile.h execinfo.h getopt.h ifaddrs.h langinfo.h mbarrier.h poll.h sys/epoll.h sys/event.h sys/ipc.h sys/personality.h sys/prctl.h sys/procctl.h sys/pstat.h sys/resource.h sys/select.h sys/sem.h sys/shm.h sys/signalfd.h sys/sockio.h sys/tas.h sys/uio.h sys/un.h termios.h ucred.h wctype.h
+for ac_header in atomic.h copyfile.h execinfo.h getopt.h ifaddrs.h langinfo.h mbarrier.h poll.h sys/epoll.h sys/event.h sys/ipc.h sys/personality.h sys/prctl.h sys/procctl.h sys/resource.h sys/select.h sys/sem.h sys/shm.h sys/signalfd.h sys/sockio.h sys/tas.h sys/uio.h sys/un.h termios.h ucred.h wctype.h
do :
as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
@@ -15987,7 +15892,7 @@ fi
LIBS_including_readline="$LIBS"
LIBS=`echo "$LIBS" | sed -e 's/-ledit//g' -e 's/-lreadline//g'`
-for ac_func in backtrace_symbols clock_gettime copyfile fdatasync getifaddrs getpeerucred getrlimit inet_pton kqueue mbstowcs_l memset_s poll posix_fallocate ppoll pstat pthread_is_threaded_np readlink readv setproctitle setproctitle_fast setsid shm_open strchrnul strsignal symlink syncfs sync_file_range uselocale wcstombs_l writev
+for ac_func in backtrace_symbols clock_gettime copyfile fdatasync getifaddrs getpeerucred getrlimit inet_pton kqueue mbstowcs_l memset_s poll posix_fallocate ppoll pthread_is_threaded_np readlink readv setproctitle setproctitle_fast setsid shm_open strchrnul strsignal symlink syncfs sync_file_range uselocale wcstombs_l writev
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
diff --git a/configure.ac b/configure.ac
index 6c6f997ee3..7fbfb6795f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -67,7 +67,6 @@ case $host_os in
darwin*) template=darwin ;;
dragonfly*) template=netbsd ;;
freebsd*) template=freebsd ;;
- hpux*) template=hpux ;;
linux*|gnu*|k*bsd*-gnu)
template=linux ;;
mingw*) template=win32 ;;
@@ -570,11 +569,6 @@ elif test "$PORTNAME" = "aix"; then
PGAC_PROG_CXX_CFLAGS_OPT([-qnoansialias])
PGAC_PROG_CC_CFLAGS_OPT([-qlonglong])
PGAC_PROG_CXX_CFLAGS_OPT([-qlonglong])
-elif test "$PORTNAME" = "hpux"; then
- # On some versions of HP-UX, libm functions do not set errno by default.
- # Fix that by using +Olibmerrno if the compiler recognizes it.
- PGAC_PROG_CC_CFLAGS_OPT([+Olibmerrno])
- PGAC_PROG_CXX_CFLAGS_OPT([+Olibmerrno])
fi
AC_SUBST(CFLAGS_UNROLL_LOOPS)
@@ -1452,7 +1446,6 @@ AC_CHECK_HEADERS(m4_normalize([
sys/personality.h
sys/prctl.h
sys/procctl.h
- sys/pstat.h
sys/resource.h
sys/select.h
sys/sem.h
@@ -1801,7 +1794,6 @@ AC_CHECK_FUNCS(m4_normalize([
poll
posix_fallocate
ppoll
- pstat
pthread_is_threaded_np
readlink
readv
diff --git a/doc/src/sgml/dfunc.sgml b/doc/src/sgml/dfunc.sgml
index a635767621..7bdf7f6070 100644
--- a/doc/src/sgml/dfunc.sgml
+++ b/doc/src/sgml/dfunc.sgml
@@ -75,35 +75,6 @@ gcc -shared -o foo.so foo.o
</listitem>
</varlistentry>
- <varlistentry>
- <term>
- <systemitem class="osname">HP-UX</systemitem>
- <indexterm><primary>HP-UX</primary><secondary>shared library</secondary></indexterm>
- </term>
- <listitem>
- <para>
- The compiler flag of the system compiler to create
- <acronym>PIC</acronym> is <option>+z</option>. When using
- <application>GCC</application> it's <option>-fPIC</option>. The
- linker flag for shared libraries is <option>-b</option>. So:
-<programlisting>
-cc +z -c foo.c
-</programlisting>
- or:
-<programlisting>
-gcc -fPIC -c foo.c
-</programlisting>
- and then:
-<programlisting>
-ld -b -o foo.sl foo.o
-</programlisting>
- <systemitem class="osname">HP-UX</systemitem> uses the extension
- <filename>.sl</filename> for shared libraries, unlike most other
- systems.
- </para>
- </listitem>
- </varlistentry>
-
<varlistentry>
<term>
<systemitem class="osname">Linux</systemitem>
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index c585078029..6ab3a65e48 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -1974,7 +1974,6 @@ build-postgresql:
shared libraries. The systems on which this is
<emphasis>not</emphasis> necessary include
<systemitem class="osname">FreeBSD</systemitem>,
- <systemitem class="osname">HP-UX</systemitem>,
<systemitem class="osname">Linux</systemitem>,
<systemitem class="osname">NetBSD</systemitem>, <systemitem
class="osname">OpenBSD</systemitem>, and
@@ -2137,7 +2136,7 @@ export MANPATH
<para>
<productname>PostgreSQL</productname> can be expected to work on these operating
systems: Linux (all recent distributions), Windows (XP and later),
- FreeBSD, OpenBSD, NetBSD, macOS, AIX, HP/UX, and Solaris.
+ FreeBSD, OpenBSD, NetBSD, macOS, AIX, and Solaris.
Other Unix-like systems may also work but are not currently
being tested. In most cases, all CPU architectures supported by
a given operating system will work. Look in
diff --git a/doc/src/sgml/regress.sgml b/doc/src/sgml/regress.sgml
index 952139fc60..8f032c4e7a 100644
--- a/doc/src/sgml/regress.sgml
+++ b/doc/src/sgml/regress.sgml
@@ -689,13 +689,13 @@ testname:output:platformpattern=comparisonfilename
Therefore, we provide a variant comparison file,
<filename>float4-misrounded-input.out</filename>, which includes
the results to be expected on these systems. To silence the bogus
- <quote>failure</quote> message on <systemitem>HP-UX 10</systemitem>
+ <quote>failure</quote> message on <systemitem>Cygwin</systemitem>
platforms, <filename>resultmap</filename> includes:
<programlisting>
-float4:out:hppa.*-hp-hpux10.*=float4-misrounded-input.out
+float4:out:.*-.*-cygwin.*=float4-misrounded-input.out
</programlisting>
which will trigger on any machine where the output of
- <command>config.guess</command> matches <literal>hppa.*-hp-hpux10.*</literal>.
+ <command>config.guess</command> matches <literal>.*-.*-cygwin.*</literal>.
Other lines in <filename>resultmap</filename> select the variant comparison
file for other platforms where it's appropriate.
</para>
diff --git a/doc/src/sgml/runtime.sgml b/doc/src/sgml/runtime.sgml
index 2352389ab6..92a1ea87d8 100644
--- a/doc/src/sgml/runtime.sgml
+++ b/doc/src/sgml/runtime.sgml
@@ -1018,25 +1018,6 @@ psql: error: connection to server on socket "/tmp/.s.PGSQL.5432" failed: No such
</listitem>
</varlistentry>
- <varlistentry>
- <term><systemitem class="osname">HP-UX</systemitem>
- <indexterm><primary>HP-UX</primary><secondary>IPC configuration</secondary></indexterm>
- </term>
- <listitem>
- <para>
- The default settings tend to suffice for normal installations.
- </para>
- <para>
- <acronym>IPC</acronym> parameters can be set in the <application>System
- Administration Manager</application> (<acronym>SAM</acronym>) under
- <menuchoice><guimenu>Kernel
- Configuration</guimenu><guimenuitem>Configurable Parameters</guimenuitem></menuchoice>. Choose
- <guibutton>Create A New Kernel</guibutton> when you're done.
- </para>
- </listitem>
- </varlistentry>
-
-
<varlistentry>
<term><systemitem class="osname">Linux</systemitem>
<indexterm><primary>Linux</primary><secondary>IPC configuration</secondary></indexterm>
diff --git a/src/Makefile.shlib b/src/Makefile.shlib
index 551023c6fb..a7606bc5d9 100644
--- a/src/Makefile.shlib
+++ b/src/Makefile.shlib
@@ -177,39 +177,6 @@ ifeq ($(PORTNAME), netbsd)
endif
endif
-ifeq ($(PORTNAME), hpux)
- ifdef SO_MAJOR_VERSION
- shlib = lib$(NAME)$(DLSUFFIX).$(SO_MAJOR_VERSION)
- endif
- ifeq ($(with_gnu_ld), yes)
- LINK.shared = $(CC) -shared -Wl,-Bsymbolic
- ifdef soname
- LINK.shared += -Wl,-h -Wl,$(soname)
- endif
- else
- LINK.shared = $(LD) -b -Bsymbolic
- ifdef soname
- LINK.shared += +h $(soname)
- endif
- # can't use the CC-syntax rpath pattern here, so instead:
- rpath =
- ifeq ($(enable_rpath), yes)
- LINK.shared += +s +b '$(rpathdir)'
- endif
- # On HPUX platforms, gcc is usually configured to search for libraries
- # in /usr/local/lib, but ld won't do so. Add an explicit -L switch so
- # ld can find the same libraries gcc does. Make sure it goes after any
- # -L switches provided explicitly.
- ifeq ($(GCC), yes)
- SHLIB_LINK += -L/usr/local/lib
- endif
- endif
- # And we need to link with libgcc, too
- ifeq ($(GCC), yes)
- SHLIB_LINK += `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- endif
-endif
-
ifeq ($(PORTNAME), linux)
LINK.shared = $(COMPILER) -shared
ifdef soname
diff --git a/src/backend/libpq/ifaddr.c b/src/backend/libpq/ifaddr.c
index a41808aff0..5494c9b303 100644
--- a/src/backend/libpq/ifaddr.c
+++ b/src/backend/libpq/ifaddr.c
@@ -333,17 +333,11 @@ pg_foreach_ifaddr(PgIfAddrCallback callback, void *cb_data)
#endif
/*
- * SIOCGIFCONF does not return IPv6 addresses on Solaris
- * and HP/UX. So we prefer SIOCGLIFCONF if it's available.
- *
- * On HP/UX, however, it *only* returns IPv6 addresses,
- * and the structs are named slightly differently too.
- * We'd have to do another call with SIOCGIFCONF to get the
- * IPv4 addresses as well. We don't currently bother, just
- * fall back to SIOCGIFCONF on HP/UX.
+ * SIOCGIFCONF does not return IPv6 addresses on Solaris.
+ * So we prefer SIOCGLIFCONF if it's available.
*/
-#if defined(SIOCGLIFCONF) && !defined(__hpux)
+#if defined(SIOCGLIFCONF)
/*
* Enumerate the system's network interface addresses and call the callback
diff --git a/src/backend/port/hpux/tas.c.template b/src/backend/port/hpux/tas.c.template
deleted file mode 100644
index 5ccbbcde9a..0000000000
--- a/src/backend/port/hpux/tas.c.template
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * tas() for HPPA.
- *
- * To generate tas.s using this template:
- * 1. cc +O2 -S -c tas.c
- * 2. edit tas.s:
- * - replace the LDW with LDCWX
- * 3. install as src/backend/port/tas/hpux_hppa.s.
- *
- * For details about the LDCWX instruction, see the "Precision
- * Architecture and Instruction Reference Manual" (09740-90014 of June
- * 1987), p. 5-38.
- */
-
-int
-tas(lock)
- int *lock; /* LDCWX is a word instruction */
-{
- /*
- * LDCWX requires that we align the "semaphore" to a 16-byte
- * boundary. The actual datum is a single word (4 bytes).
- */
- lock = ((uintptr_t) lock + 15) & ~15;
-
- /*
- * The LDCWX instruction atomically clears the target word and
- * returns the previous value. Hence, if the instruction returns
- * 0, someone else has already acquired the lock before we tested
- * it (i.e., we have failed).
- *
- * Notice that this means that we actually clear the word to set
- * the lock and set the word to clear the lock. This is the
- * opposite behavior from the SPARC LDSTUB instruction. For some
- * reason everything that H-P does is rather baroque...
- */
- if (*lock) { /* this generates the LDW */
- return(0); /* success */
- }
- return(1); /* failure */
-}
diff --git a/src/backend/port/tas/hpux_hppa.s b/src/backend/port/tas/hpux_hppa.s
deleted file mode 100644
index d978a7cb03..0000000000
--- a/src/backend/port/tas/hpux_hppa.s
+++ /dev/null
@@ -1,28 +0,0 @@
-
- .SPACE $TEXT$,SORT=8
- .SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=44,CODE_ONLY,SORT=24
-tas
- .PROC
- .CALLINFO CALLER,FRAME=0,ENTRY_SR=3
- .ENTRY
- LDO 15(%r26),%r31 ;offset 0x0
- DEPI 0,31,4,%r31 ;offset 0x4
- LDCWX 0(0,%r31),%r23 ;offset 0x8
- COMICLR,= 0,%r23,%r0 ;offset 0xc
- DEP,TR %r0,31,32,%r28 ;offset 0x10
-$00000001
- LDI 1,%r28 ;offset 0x14
-$L0
- .EXIT
- BV,N %r0(%r2) ;offset 0x18
- .PROCEND ;in=26;out=28;
-
-
- .SPACE $TEXT$
- .SUBSPA $CODE$
- .SPACE $PRIVATE$,SORT=16
- .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=16
- .SPACE $TEXT$
- .SUBSPA $CODE$
- .EXPORT tas,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR
- .END
diff --git a/src/backend/tcop/postgres.c b/src/backend/tcop/postgres.c
index 5ab91c2c58..dcf339adbb 100644
--- a/src/backend/tcop/postgres.c
+++ b/src/backend/tcop/postgres.c
@@ -132,13 +132,6 @@ static long max_stack_depth_bytes = 100 * 1024L;
*/
static char *stack_base_ptr = NULL;
-/*
- * On IA64 we also have to remember the register stack base.
- */
-#if defined(__ia64__) || defined(__ia64)
-static char *register_stack_base_ptr = NULL;
-#endif
-
/*
* Flag to keep track of whether we have started a transaction.
* For extended query protocol this has to be remembered across messages.
@@ -3393,44 +3386,6 @@ ProcessInterrupts(void)
}
-/*
- * IA64-specific code to fetch the AR.BSP register for stack depth checks.
- *
- * We currently support gcc, icc, and HP-UX's native compiler here.
- *
- * Note: while icc accepts gcc asm blocks on x86[_64], this is not true on
- * ia64 (at least not in icc versions before 12.x). So we have to carry a
- * separate implementation for it.
- */
-#if defined(__ia64__) || defined(__ia64)
-
-#if defined(__hpux) && !defined(__GNUC__) && !defined(__INTEL_COMPILER)
-/* Assume it's HP-UX native compiler */
-#include <ia64/sys/inline.h>
-#define ia64_get_bsp() ((char *) (_Asm_mov_from_ar(_AREG_BSP, _NO_FENCE)))
-#elif defined(__INTEL_COMPILER)
-/* icc */
-#include <asm/ia64regs.h>
-#define ia64_get_bsp() ((char *) __getReg(_IA64_REG_AR_BSP))
-#else
-/* gcc */
-static __inline__ char *
-ia64_get_bsp(void)
-{
- char *ret;
-
- /* the ;; is a "stop", seems to be required before fetching BSP */
- __asm__ __volatile__(
- ";;\n"
- " mov %0=ar.bsp \n"
-: "=r"(ret));
-
- return ret;
-}
-#endif
-#endif /* IA64 */
-
-
/*
* set_stack_base: set up reference point for stack depth checking
*
@@ -3444,12 +3399,7 @@ set_stack_base(void)
#endif
pg_stack_base_t old;
-#if defined(__ia64__) || defined(__ia64)
- old.stack_base_ptr = stack_base_ptr;
- old.register_stack_base_ptr = register_stack_base_ptr;
-#else
old = stack_base_ptr;
-#endif
/*
* Set up reference point for stack depth checking. On recent gcc we use
@@ -3461,9 +3411,6 @@ set_stack_base(void)
#else
stack_base_ptr = &stack_base;
#endif
-#if defined(__ia64__) || defined(__ia64)
- register_stack_base_ptr = ia64_get_bsp();
-#endif
return old;
}
@@ -3480,12 +3427,7 @@ set_stack_base(void)
void
restore_stack_base(pg_stack_base_t base)
{
-#if defined(__ia64__) || defined(__ia64)
- stack_base_ptr = base.stack_base_ptr;
- register_stack_base_ptr = base.register_stack_base_ptr;
-#else
stack_base_ptr = base;
-#endif
}
/*
@@ -3542,22 +3484,6 @@ stack_is_too_deep(void)
stack_base_ptr != NULL)
return true;
- /*
- * On IA64 there is a separate "register" stack that requires its own
- * independent check. For this, we have to measure the change in the
- * "BSP" pointer from PostgresMain to here. Logic is just as above,
- * except that we know IA64's register stack grows up.
- *
- * Note we assume that the same max_stack_depth applies to both stacks.
- */
-#if defined(__ia64__) || defined(__ia64)
- stack_depth = (long) (ia64_get_bsp() - register_stack_base_ptr);
-
- if (stack_depth > max_stack_depth_bytes &&
- register_stack_base_ptr != NULL)
- return true;
-#endif /* IA64 */
-
return false;
}
diff --git a/src/backend/utils/misc/ps_status.c b/src/backend/utils/misc/ps_status.c
index ec314c03f5..8520ce76bb 100644
--- a/src/backend/utils/misc/ps_status.c
+++ b/src/backend/utils/misc/ps_status.c
@@ -15,9 +15,6 @@
#include "postgres.h"
#include <unistd.h>
-#ifdef HAVE_SYS_PSTAT_H
-#include <sys/pstat.h> /* for HP-UX */
-#endif
#ifdef HAVE_PS_STRINGS
#include <machine/vmparam.h> /* for old BSD */
#include <sys/exec.h>
@@ -45,9 +42,6 @@ bool update_process_title = true;
* PS_USE_SETPROCTITLE
* use the function setproctitle(const char *, ...)
* (newer BSD systems)
- * PS_USE_PSTAT
- * use the pstat(PSTAT_SETCMD, )
- * (HPUX)
* PS_USE_PS_STRINGS
* assign PS_STRINGS->ps_argvstr = "string"
* (some BSD systems)
@@ -67,8 +61,6 @@ bool update_process_title = true;
#define PS_USE_SETPROCTITLE_FAST
#elif defined(HAVE_SETPROCTITLE)
#define PS_USE_SETPROCTITLE
-#elif defined(HAVE_PSTAT) && defined(PSTAT_SETCMD)
-#define PS_USE_PSTAT
#elif defined(HAVE_PS_STRINGS)
#define PS_USE_PS_STRINGS
#elif (defined(BSD) || defined(__hurd__)) && !defined(__darwin__)
@@ -376,15 +368,6 @@ set_ps_display(const char *activity)
setproctitle_fast("%s", ps_buffer);
#endif
-#ifdef PS_USE_PSTAT
- {
- union pstun pst;
-
- pst.pst_command = ps_buffer;
- pstat(PSTAT_SETCMD, pst, ps_buffer_cur_len, 0, 0);
- }
-#endif /* PS_USE_PSTAT */
-
#ifdef PS_USE_PS_STRINGS
PS_STRINGS->ps_nargvstr = 1;
PS_STRINGS->ps_argvstr = ps_buffer;
diff --git a/src/common/sprompt.c b/src/common/sprompt.c
index 8b836846e3..5ad90f59bb 100644
--- a/src/common/sprompt.c
+++ b/src/common/sprompt.c
@@ -90,7 +90,7 @@ simple_prompt_extended(const char *prompt, bool echo,
/*
* Do not try to collapse these into one "w+" mode file. Doesn't work on
- * some platforms (eg, HPUX 10.20).
+ * some platforms.
*/
termin = fopen("/dev/tty", "r");
termout = fopen("/dev/tty", "w");
diff --git a/src/include/miscadmin.h b/src/include/miscadmin.h
index 0af130fbc5..ea9a56d395 100644
--- a/src/include/miscadmin.h
+++ b/src/include/miscadmin.h
@@ -279,15 +279,7 @@ extern PGDLLIMPORT bool VacuumCostActive;
/* in tcop/postgres.c */
-#if defined(__ia64__) || defined(__ia64)
-typedef struct
-{
- char *stack_base_ptr;
- char *register_stack_base_ptr;
-} pg_stack_base_t;
-#else
typedef char *pg_stack_base_t;
-#endif
extern pg_stack_base_t set_stack_base(void);
extern void restore_stack_base(pg_stack_base_t base);
diff --git a/src/include/pg_config.h.in b/src/include/pg_config.h.in
index cdd742cb55..7133c3dc66 100644
--- a/src/include/pg_config.h.in
+++ b/src/include/pg_config.h.in
@@ -430,9 +430,6 @@
/* Define to 1 if you have the `pread' function. */
#undef HAVE_PREAD
-/* Define to 1 if you have the `pstat' function. */
-#undef HAVE_PSTAT
-
/* Define to 1 if the PS_STRINGS thing exists. */
#undef HAVE_PS_STRINGS
@@ -625,9 +622,6 @@
/* Define to 1 if you have the <sys/procctl.h> header file. */
#undef HAVE_SYS_PROCCTL_H
-/* Define to 1 if you have the <sys/pstat.h> header file. */
-#undef HAVE_SYS_PSTAT_H
-
/* Define to 1 if you have the <sys/resource.h> header file. */
#undef HAVE_SYS_RESOURCE_H
diff --git a/src/include/port/atomics.h b/src/include/port/atomics.h
index 9550e04aaa..f7cd0f6f20 100644
--- a/src/include/port/atomics.h
+++ b/src/include/port/atomics.h
@@ -68,8 +68,6 @@
#include "port/atomics/arch-arm.h"
#elif defined(__i386__) || defined(__i386) || defined(__x86_64__)
#include "port/atomics/arch-x86.h"
-#elif defined(__ia64__) || defined(__ia64)
-#include "port/atomics/arch-ia64.h"
#elif defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(__powerpc64__)
#include "port/atomics/arch-ppc.h"
#elif defined(__hppa) || defined(__hppa__)
@@ -95,8 +93,6 @@
#include "port/atomics/generic-gcc.h"
#elif defined(_MSC_VER)
#include "port/atomics/generic-msvc.h"
-#elif defined(__hpux) && defined(__ia64) && !defined(__GNUC__)
-#include "port/atomics/generic-acc.h"
#elif defined(__SUNPRO_C) && !defined(__GNUC__)
#include "port/atomics/generic-sunpro.h"
#else
diff --git a/src/include/port/atomics/arch-ia64.h b/src/include/port/atomics/arch-ia64.h
deleted file mode 100644
index 771bac1f3e..0000000000
--- a/src/include/port/atomics/arch-ia64.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * arch-ia64.h
- * Atomic operations considerations specific to intel itanium
- *
- * Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * src/include/port/atomics/arch-ia64.h
- *
- *-------------------------------------------------------------------------
- */
-
-/*
- * Itanium is weakly ordered, so read and write barriers require a full
- * fence.
- */
-#if defined(__INTEL_COMPILER)
-# define pg_memory_barrier_impl() __mf()
-#elif defined(__GNUC__)
-# define pg_memory_barrier_impl() __asm__ __volatile__ ("mf" : : : "memory")
-#elif defined(__hpux)
-# define pg_memory_barrier_impl() _Asm_mf()
-#endif
-
-/* per architecture manual doubleword accesses have single copy atomicity */
-#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY
diff --git a/src/include/port/atomics/fallback.h b/src/include/port/atomics/fallback.h
index 1cdef5f2f6..91a9be4828 100644
--- a/src/include/port/atomics/fallback.h
+++ b/src/include/port/atomics/fallback.h
@@ -93,7 +93,7 @@ typedef struct pg_atomic_flag
typedef struct pg_atomic_uint32
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
+#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
int sema[4];
#else
int sema;
@@ -111,7 +111,7 @@ typedef struct pg_atomic_uint32
typedef struct pg_atomic_uint64
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
+#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
int sema[4];
#else
int sema;
diff --git a/src/include/port/atomics/generic-acc.h b/src/include/port/atomics/generic-acc.h
deleted file mode 100644
index 842b2dec6e..0000000000
--- a/src/include/port/atomics/generic-acc.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * generic-acc.h
- * Atomic operations support when using HPs acc on HPUX
- *
- * Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * Documentation:
- * * inline assembly for Itanium-based HP-UX:
- * http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/inline_assem_ERS.pdf
- * * Implementing Spinlocks on the Intel (R) Itanium (R) Architecture and PA-RISC
- * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
- *
- * Itanium only supports a small set of numbers (6, -8, -4, -1, 1, 4, 8, 16)
- * for atomic add/sub, so we just implement everything but compare_exchange
- * via the compare_exchange fallbacks in atomics/generic.h.
- *
- * src/include/port/atomics/generic-acc.h
- *
- * -------------------------------------------------------------------------
- */
-
-#include <machine/sys/inline.h>
-
-#define pg_compiler_barrier_impl() _Asm_sched_fence()
-
-#if defined(HAVE_ATOMICS)
-
-/* IA64 always has 32/64 bit atomics */
-
-#define PG_HAVE_ATOMIC_U32_SUPPORT
-typedef struct pg_atomic_uint32
-{
- volatile uint32 value;
-} pg_atomic_uint32;
-
-#define PG_HAVE_ATOMIC_U64_SUPPORT
-typedef struct pg_atomic_uint64
-{
- /*
- * Alignment is guaranteed to be 64bit. Search for "Well-behaved
- * application restrictions" => "Data alignment and data sharing" on HP's
- * website. Unfortunately the URL doesn't seem to stable enough to
- * include.
- */
- volatile uint64 value;
-} pg_atomic_uint64;
-
-
-#define MINOR_FENCE (_Asm_fence) (_UP_CALL_FENCE | _UP_SYS_FENCE | \
- _DOWN_CALL_FENCE | _DOWN_SYS_FENCE )
-
-#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U32
-static inline bool
-pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
- uint32 *expected, uint32 newval)
-{
- bool ret;
- uint32 current;
-
- _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
- /*
- * We want a barrier, not just release/acquire semantics.
- */
- _Asm_mf();
- /*
- * Notes:
- * _DOWN_MEM_FENCE | _UP_MEM_FENCE prevents reordering by the compiler
- */
- current = _Asm_cmpxchg(_SZ_W, /* word */
- _SEM_REL,
- &ptr->value,
- newval, _LDHINT_NONE,
- _DOWN_MEM_FENCE | _UP_MEM_FENCE);
- ret = current == *expected;
- *expected = current;
- return ret;
-}
-
-
-#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U64
-static inline bool
-pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr,
- uint64 *expected, uint64 newval)
-{
- bool ret;
- uint64 current;
-
- _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
- _Asm_mf();
- current = _Asm_cmpxchg(_SZ_D, /* doubleword */
- _SEM_REL,
- &ptr->value,
- newval, _LDHINT_NONE,
- _DOWN_MEM_FENCE | _UP_MEM_FENCE);
- ret = current == *expected;
- *expected = current;
- return ret;
-}
-
-#undef MINOR_FENCE
-
-#endif /* defined(HAVE_ATOMICS) */
diff --git a/src/include/port/hpux.h b/src/include/port/hpux.h
deleted file mode 100644
index 4d1dcea70c..0000000000
--- a/src/include/port/hpux.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* src/include/port/hpux.h */
-
-/* nothing needed */
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 98b4d718d2..a7ab0da156 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -250,71 +250,6 @@ spin_delay(void)
#endif /* __x86_64__ */
-#if defined(__ia64__) || defined(__ia64)
-/*
- * Intel Itanium, gcc or Intel's compiler.
- *
- * Itanium has weak memory ordering, but we rely on the compiler to enforce
- * strict ordering of accesses to volatile data. In particular, while the
- * xchg instruction implicitly acts as a memory barrier with 'acquire'
- * semantics, we do not have an explicit memory fence instruction in the
- * S_UNLOCK macro. We use a regular assignment to clear the spinlock, and
- * trust that the compiler marks the generated store instruction with the
- * ".rel" opcode.
- *
- * Testing shows that assumption to hold on gcc, although I could not find
- * any explicit statement on that in the gcc manual. In Intel's compiler,
- * the -m[no-]serialize-volatile option controls that, and testing shows that
- * it is enabled by default.
- *
- * While icc accepts gcc asm blocks on x86[_64], this is not true on ia64
- * (at least not in icc versions before 12.x). So we have to carry a separate
- * compiler-intrinsic-based implementation for it.
- */
-#define HAS_TEST_AND_SET
-
-typedef unsigned int slock_t;
-
-#define TAS(lock) tas(lock)
-
-/* On IA64, it's a win to use a non-locking test before the xchg proper */
-#define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))
-
-#ifndef __INTEL_COMPILER
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- long int ret;
-
- __asm__ __volatile__(
- " xchg4 %0=%1,%2 \n"
-: "=r"(ret), "+m"(*lock)
-: "r"(1)
-: "memory");
- return (int) ret;
-}
-
-#else /* __INTEL_COMPILER */
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- int ret;
-
- ret = _InterlockedExchange(lock,1); /* this is a xchg asm macro */
-
- return ret;
-}
-
-/* icc can't use the regular gcc S_UNLOCK() macro either in this case */
-#define S_UNLOCK(lock) \
- do { __memory_barrier(); *(lock) = 0; } while (0)
-
-#endif /* __INTEL_COMPILER */
-#endif /* __ia64__ || __ia64 */
-
-
/*
* On ARM and ARM64, we use __sync_lock_test_and_set(int *, int) if available.
*
@@ -765,44 +700,14 @@ tas(volatile slock_t *lock)
typedef unsigned char slock_t;
#endif
-/*
- * Default implementation of S_UNLOCK() for gcc/icc.
- *
- * Note that this implementation is unsafe for any platform that can reorder
- * a memory access (either load or store) after a following store. That
- * happens not to be possible on x86 and most legacy architectures (some are
- * single-processor!), but many modern systems have weaker memory ordering.
- * Those that do must define their own version of S_UNLOCK() rather than
- * relying on this one.
- */
-#if !defined(S_UNLOCK)
-#define S_UNLOCK(lock) \
- do { __asm__ __volatile__("" : : : "memory"); *(lock) = 0; } while (0)
-#endif
-
-#endif /* defined(__GNUC__) || defined(__INTEL_COMPILER) */
-
-
-/*
- * ---------------------------------------------------------------------
- * Platforms that use non-gcc inline assembly:
- * ---------------------------------------------------------------------
- */
-
-#if !defined(HAS_TEST_AND_SET) /* We didn't trigger above, let's try here */
-
-
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
+#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
/*
* HP's PA-RISC
*
- * See src/backend/port/hpux/tas.c.template for details about LDCWX. Because
- * LDCWX requires a 16-byte-aligned address, we declare slock_t as a 16-byte
- * struct. The active word in the struct is whichever has the aligned address;
- * the other three words just sit at -1.
- *
- * When using gcc, we can inline the required assembly code.
+ * Because LDCWX requires a 16-byte-aligned address, we declare slock_t as a
+ * 16-byte struct. The active word in the struct is whichever has the aligned
+ * address; the other three words just sit at -1.
*/
#define HAS_TEST_AND_SET
@@ -813,8 +718,6 @@ typedef struct
#define TAS_ACTIVE_WORD(lock) ((volatile int *) (((uintptr_t) (lock) + 15) & ~15))
-#if defined(__GNUC__)
-
static __inline__ int
tas(volatile slock_t *lock)
{
@@ -829,23 +732,12 @@ tas(volatile slock_t *lock)
return (lockval == 0);
}
-/*
- * The hppa implementation doesn't follow the rules of this files and provides
- * a gcc specific implementation outside of the above defined(__GNUC__). It
- * does so to avoid duplication between the HP compiler and gcc. So undefine
- * the generic fallback S_UNLOCK from above.
- */
-#ifdef S_UNLOCK
-#undef S_UNLOCK
-#endif
#define S_UNLOCK(lock) \
do { \
__asm__ __volatile__("" : : : "memory"); \
*TAS_ACTIVE_WORD(lock) = -1; \
} while (0)
-#endif /* __GNUC__ */
-
#define S_INIT_LOCK(lock) \
do { \
volatile slock_t *lock_ = (lock); \
@@ -860,32 +752,31 @@ tas(volatile slock_t *lock)
#endif /* __hppa || __hppa__ */
-#if defined(__hpux) && defined(__ia64) && !defined(__GNUC__)
/*
- * HP-UX on Itanium, non-gcc/icc compiler
- *
- * We assume that the compiler enforces strict ordering of loads/stores on
- * volatile data (see comments on the gcc-version earlier in this file).
- * Note that this assumption does *not* hold if you use the
- * +Ovolatile=__unordered option on the HP-UX compiler, so don't do that.
+ * Default implementation of S_UNLOCK() for gcc/icc.
*
- * See also Implementing Spinlocks on the Intel Itanium Architecture and
- * PA-RISC, by Tor Ekqvist and David Graves, for more information. As of
- * this writing, version 1.0 of the manual is available at:
- * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
+ * Note that this implementation is unsafe for any platform that can reorder
+ * a memory access (either load or store) after a following store. That
+ * happens not to be possible on x86 and most legacy architectures (some are
+ * single-processor!), but many modern systems have weaker memory ordering.
+ * Those that do must define their own version of S_UNLOCK() rather than
+ * relying on this one.
*/
-#define HAS_TEST_AND_SET
+#if !defined(S_UNLOCK)
+#define S_UNLOCK(lock) \
+ do { __asm__ __volatile__("" : : : "memory"); *(lock) = 0; } while (0)
+#endif
-typedef unsigned int slock_t;
+#endif /* defined(__GNUC__) || defined(__INTEL_COMPILER) */
-#include <ia64/sys/inline.h>
-#define TAS(lock) _Asm_xchg(_SZ_W, lock, 1, _LDHINT_NONE)
-/* On IA64, it's a win to use a non-locking test before the xchg proper */
-#define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))
-#define S_UNLOCK(lock) \
- do { _Asm_mf(); (*(lock)) = 0; } while (0)
-#endif /* HPUX on IA64, non gcc/icc */
+/*
+ * ---------------------------------------------------------------------
+ * Platforms that use non-gcc inline assembly:
+ * ---------------------------------------------------------------------
+ */
+
+#if !defined(HAS_TEST_AND_SET) /* We didn't trigger above, let's try here */
#if defined(_AIX) /* AIX */
/*
diff --git a/src/makefiles/Makefile.hpux b/src/makefiles/Makefile.hpux
deleted file mode 100644
index 25e036bd8d..0000000000
--- a/src/makefiles/Makefile.hpux
+++ /dev/null
@@ -1,47 +0,0 @@
-# Using X/Open Networking Interfaces requires to link with libxnet.
-# Without specifying this, bind(), getpeername() and so on don't work
-# correctly in the LP64 data model.
-LIBS := -lxnet $(LIBS)
-
-# Set up rpath so that the executables don't need SHLIB_PATH to be set.
-# (Note: --disable-rpath is a really bad idea on this platform...)
-ifeq ($(with_gnu_ld), yes)
- rpath = -Wl,-rpath -Wl,'$(rpathdir)'
-else
- rpath = -Wl,+b -Wl,'$(rpathdir)'
-endif
-
-# catch null pointer dereferences
-ifeq ($(with_gnu_ld), yes)
-# XXX what to put here?
-else
- LDFLAGS_EX += -Wl,-z
-endif
-
-# set up appropriate options for shared library builds
-export_dynamic = -Wl,-E
-
-INSTALL_SHLIB_OPTS = -m 555
-
-AROPT = crs
-
-# env var name to use in place of LD_LIBRARY_PATH
-ld_library_path_var = SHLIB_PATH
-
-# Rule for building a shared library from a single .o file
-%$(DLSUFFIX): %.o
-ifeq ($(GCC), yes)
- ifeq ($(with_gnu_ld), yes)
- $(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@ `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- else
- $(LD) -b -o $@ $< `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- endif
-else
- ifeq ($(with_gnu_ld), yes)
- $(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@
- else
- $(LD) -b -o $@ $<
- endif
-endif
-
-sqlmansect = 5
diff --git a/src/port/dlopen.c b/src/port/dlopen.c
index d441dc8196..6ff9f4bf64 100644
--- a/src/port/dlopen.c
+++ b/src/port/dlopen.c
@@ -15,55 +15,7 @@
#include "c.h"
-#if defined(__hpux)
-
-/* System includes */
-#include <a.out.h>
-#include <dl.h>
-
-void *
-dlopen(const char *file, int mode)
-{
- int flags = 0;
-
- if (mode & RTLD_NOW)
- flags |= BIND_IMMEDIATE;
-#ifdef NOT_USED
- if (mode & RTLD_LAZY)
- flags |= BIND_DEFERRED;
-#endif
-
- return shl_load(file, flags | BIND_VERBOSE, 0L);
-}
-
-void *
-dlsym(void *handle, const char *symbol)
-{
- void *value;
-
- if (shl_findsym((shl_t *) & handle, symbol, TYPE_PROCEDURE, &value) == -1)
- return NULL;
- return value;
-}
-
-int
-dlclose(void *handle)
-{
- return shl_unload((shl_t) handle);
-}
-
-char *
-dlerror(void)
-{
- static char errmsg[] = "shl_load failed";
-
- if (errno)
- return strerror(errno);
-
- return errmsg;
-}
-
-#elif defined(WIN32)
+#if defined(WIN32)
static char last_dyn_error[512];
diff --git a/src/port/getrusage.c b/src/port/getrusage.c
index 8369fd2793..02665f4032 100644
--- a/src/port/getrusage.c
+++ b/src/port/getrusage.c
@@ -20,7 +20,6 @@
/* This code works on:
* solaris_i386
* solaris_sparc
- * hpux 9.*
* win32
* which currently is all the supported platforms that don't have a
* native version of getrusage(). So, if configure decides to compile
diff --git a/src/template/hpux b/src/template/hpux
deleted file mode 100644
index 5105a74c78..0000000000
--- a/src/template/hpux
+++ /dev/null
@@ -1,34 +0,0 @@
-# src/template/hpux
-
-# Need this for access to many modern library features
-CPPFLAGS="$CPPFLAGS -D_XOPEN_SOURCE_EXTENDED"
-
-# HP's compiler likes the spelling +O2 not -O2, so adjust default CFLAGS
-if test "$GCC" != yes ; then
- CFLAGS="+O2"
-fi
-
-# Extra CFLAGS for code that will go into a shared library
-if test "$GCC" = yes ; then
- CFLAGS_SL="-fPIC"
-else
- CFLAGS_SL="+Z"
-fi
-
-# Pick right test-and-set (TAS) code. We need out-of-line assembler
-# when not using gcc.
-case $host in
- hppa*-*-hpux*)
- if test "$GCC" != yes ; then
- need_tas=yes
- tas_file=hpux_hppa.s
- fi
- ;;
-esac
-
-case $host_cpu in
- ia64)
- DLSUFFIX=".so";;
- *)
- DLSUFFIX=".sl";;
-esac
diff --git a/src/test/regress/resultmap b/src/test/regress/resultmap
index c766d03df2..8a3ed50585 100644
--- a/src/test/regress/resultmap
+++ b/src/test/regress/resultmap
@@ -1,3 +1,2 @@
float4:out:.*-.*-cygwin.*=float4-misrounded-input.out
float4:out:.*-.*-mingw.*=float4-misrounded-input.out
-float4:out:hppa.*-hp-hpux10.*=float4-misrounded-input.out
diff --git a/src/tools/msvc/Solution.pm b/src/tools/msvc/Solution.pm
index d30e8fcb11..52ff56ba83 100644
--- a/src/tools/msvc/Solution.pm
+++ b/src/tools/msvc/Solution.pm
@@ -337,7 +337,6 @@ sub GenerateFiles
HAVE_PPC_LWARX_MUTEX_HINT => undef,
HAVE_PPOLL => undef,
HAVE_PREAD => undef,
- HAVE_PSTAT => undef,
HAVE_PS_STRINGS => undef,
HAVE_PTHREAD => undef,
HAVE_PTHREAD_BARRIER_WAIT => undef,
@@ -401,7 +400,6 @@ sub GenerateFiles
HAVE_SYS_PERSONALITY_H => undef,
HAVE_SYS_PRCTL_H => undef,
HAVE_SYS_PROCCTL_H => undef,
- HAVE_SYS_PSTAT_H => undef,
HAVE_SYS_RESOURCE_H => undef,
HAVE_SYS_SELECT_H => undef,
HAVE_SYS_SEM_H => undef,
diff --git a/src/tools/pginclude/cpluspluscheck b/src/tools/pginclude/cpluspluscheck
index 42688fff53..3137cddf11 100755
--- a/src/tools/pginclude/cpluspluscheck
+++ b/src/tools/pginclude/cpluspluscheck
@@ -63,7 +63,6 @@ do
test "$f" = src/include/port/cygwin.h && continue
test "$f" = src/include/port/darwin.h && continue
test "$f" = src/include/port/freebsd.h && continue
- test "$f" = src/include/port/hpux.h && continue
test "$f" = src/include/port/linux.h && continue
test "$f" = src/include/port/netbsd.h && continue
test "$f" = src/include/port/openbsd.h && continue
@@ -82,7 +81,6 @@ do
# relevant to our platform will be included by atomics.h.
test "$f" = src/include/port/atomics/arch-arm.h && continue
test "$f" = src/include/port/atomics/arch-hppa.h && continue
- test "$f" = src/include/port/atomics/arch-ia64.h && continue
test "$f" = src/include/port/atomics/arch-ppc.h && continue
test "$f" = src/include/port/atomics/arch-x86.h && continue
test "$f" = src/include/port/atomics/fallback.h && continue
diff --git a/src/tools/pginclude/headerscheck b/src/tools/pginclude/headerscheck
index f8b0674a66..ee4e593263 100755
--- a/src/tools/pginclude/headerscheck
+++ b/src/tools/pginclude/headerscheck
@@ -59,7 +59,6 @@ do
test "$f" = src/include/port/cygwin.h && continue
test "$f" = src/include/port/darwin.h && continue
test "$f" = src/include/port/freebsd.h && continue
- test "$f" = src/include/port/hpux.h && continue
test "$f" = src/include/port/linux.h && continue
test "$f" = src/include/port/netbsd.h && continue
test "$f" = src/include/port/openbsd.h && continue
@@ -78,7 +77,6 @@ do
# relevant to our platform will be included by atomics.h.
test "$f" = src/include/port/atomics/arch-arm.h && continue
test "$f" = src/include/port/atomics/arch-hppa.h && continue
- test "$f" = src/include/port/atomics/arch-ia64.h && continue
test "$f" = src/include/port/atomics/arch-ppc.h && continue
test "$f" = src/include/port/atomics/arch-x86.h && continue
test "$f" = src/include/port/atomics/fallback.h && continue
--
2.36.1
Hi,
On 2022-07-06 14:21:50 +1200, Thomas Munro wrote:
--- a/src/backend/port/hpux/tas.c.template +++ /dev/null @@ -1,40 +0,0 @@ -/* - * tas() for HPPA. - * - * To generate tas.s using this template: - * 1. cc +O2 -S -c tas.c - * 2. edit tas.s: - * - replace the LDW with LDCWX - * 3. install as src/backend/port/tas/hpux_hppa.s. - * - * For details about the LDCWX instruction, see the "Precision - * Architecture and Instruction Reference Manual" (09740-90014 of June - * 1987), p. 5-38. - */ - -int -tas(lock) - int *lock; /* LDCWX is a word instruction */ -{ - /* - * LDCWX requires that we align the "semaphore" to a 16-byte - * boundary. The actual datum is a single word (4 bytes). - */ - lock = ((uintptr_t) lock + 15) & ~15; - - /* - * The LDCWX instruction atomically clears the target word and - * returns the previous value. Hence, if the instruction returns - * 0, someone else has already acquired the lock before we tested - * it (i.e., we have failed).
- *
- * Notice that this means that we actually clear the word to set
- * the lock and set the word to clear the lock. This is the
- * opposite behavior from the SPARC LDSTUB instruction. For some
- * reason everything that H-P does is rather baroque...
- */
- if (*lock) { /* this generates the LDW */
- return(0); /* success */
- }
- return(1); /* failure */
-}
Are these comments retained elsewhere? It's confusing enough that I think we
should make sure they're somewhere until we remove hppa support...
-#if defined(__ia64__) || defined(__ia64)
-/*
- * Intel Itanium, gcc or Intel's compiler.
Hm. Personally I'd do HPUX removal separately from IA64 removal.
Greetings,
Andres Freund
Thomas Munro <thomas.munro@gmail.com> writes:
OK, here's a new attempt, this time leaving the hppa bits in. The
main tricksy bit is where s_lock.h is simplified a bit by moving the
fully inline GCC-only hppa support up a bit (it was handled a bit
weirdly with some #undef jiggery-pokery before to share stuff between
aCC and GCC), making the diff a little hard to follow. Does this make
sense? It might also be possible to drop one of __hppa and __hppa__
where they are both tested (not clear to me if that is an aCC/GCC
thing). I have no idea if this'll actually work (or ever worked) on
NetBSD/hppa... if it comes to it I could try to boot it under
qemu-system-hppa if that's what it takes, but it may be easy for you
to test...
Our HEAD does work on that NetBSD installation. I can try this
patch, but it'll take an hour or two to get results ... stay tuned.
I'm not sure about the __hppa vs __hppa__ thing. If we're assuming
that NetBSD is the only remaining hppa platform of interest, then
clearly only one of those is needed, but I don't know which one
should be preferred. It appears that both are defined on NetBSD.
(FWIW, I know that OpenBSD works on this machine too, or did the
last time I tried it. But it probably has the same opinions
as NetBSD about predefined macros.)
regards, tom lane
On Wed, Jul 6, 2022 at 3:26 PM Andres Freund <andres@anarazel.de> wrote:
On 2022-07-06 14:21:50 +1200, Thomas Munro wrote:
- * Notice that this means that we actually clear the word to set
- * the lock and set the word to clear the lock. This is the
- * opposite behavior from the SPARC LDSTUB instruction. For some
- * reason everything that H-P does is rather baroque...
Are these comments retained elsewhere? It's confusing enough that I think we
should make sure they're somewhere until we remove hppa support...
OK, I moved them into s_lock.h where the remaining asm lives.
-#if defined(__ia64__) || defined(__ia64)
-/*
- * Intel Itanium, gcc or Intel's compiler.Hm. Personally I'd do HPUX removal separately from IA64 removal.
OK, split.
Attachments:
v3-0001-Remove-HP-UX-support.patchapplication/x-patch; name=v3-0001-Remove-HP-UX-support.patchDownload
From 7df6a66d9dd5f5c0c390a6271b55b58168f79924 Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Mon, 4 Jul 2022 16:24:16 +1200
Subject: [PATCH v3 1/2] Remove HP-UX support.
HP-UX hardware is no longer produced. It is time to remove support for:
* HP-UX, the operating system.
* HP aCC, the compiler used only on HP-UX.
Reviewed-by: Andres Freund <andres@anarazel.de>
Discussion: https://postgr.es/m/1415825.1656893299%40sss.pgh.pa.us
---
configure | 99 +----------------------
configure.ac | 8 --
doc/src/sgml/dfunc.sgml | 29 -------
doc/src/sgml/installation.sgml | 3 +-
doc/src/sgml/regress.sgml | 6 +-
doc/src/sgml/runtime.sgml | 19 -----
src/Makefile.shlib | 33 --------
src/backend/libpq/ifaddr.c | 12 +--
src/backend/port/hpux/tas.c.template | 40 ----------
src/backend/port/tas/hpux_hppa.s | 28 -------
src/backend/tcop/postgres.c | 8 +-
src/backend/utils/misc/ps_status.c | 17 ----
src/common/sprompt.c | 2 +-
src/include/pg_config.h.in | 6 --
src/include/port/atomics.h | 2 -
src/include/port/atomics/arch-ia64.h | 2 -
src/include/port/atomics/fallback.h | 4 +-
src/include/port/atomics/generic-acc.h | 106 -------------------------
src/include/port/hpux.h | 3 -
src/include/storage/s_lock.h | 105 +++++++++---------------
src/makefiles/Makefile.hpux | 47 -----------
src/pl/plperl/ppport.h | 2 +-
src/port/dlopen.c | 50 +-----------
src/port/getrusage.c | 1 -
src/template/hpux | 34 --------
src/test/regress/resultmap | 1 -
src/tools/msvc/Solution.pm | 2 -
src/tools/pginclude/cpluspluscheck | 1 -
src/tools/pginclude/headerscheck | 1 -
29 files changed, 54 insertions(+), 617 deletions(-)
delete mode 100644 src/backend/port/hpux/tas.c.template
delete mode 100644 src/backend/port/tas/hpux_hppa.s
delete mode 100644 src/include/port/atomics/generic-acc.h
delete mode 100644 src/include/port/hpux.h
delete mode 100644 src/makefiles/Makefile.hpux
delete mode 100644 src/template/hpux
diff --git a/configure b/configure
index fb07cd27d9..91b7b185f9 100755
--- a/configure
+++ b/configure
@@ -2994,7 +2994,6 @@ case $host_os in
darwin*) template=darwin ;;
dragonfly*) template=netbsd ;;
freebsd*) template=freebsd ;;
- hpux*) template=hpux ;;
linux*|gnu*|k*bsd*-gnu)
template=linux ;;
mingw*) template=win32 ;;
@@ -6856,100 +6855,6 @@ if test x"$pgac_cv_prog_CXX_cxxflags__qlonglong" = x"yes"; then
fi
-elif test "$PORTNAME" = "hpux"; then
- # On some versions of HP-UX, libm functions do not set errno by default.
- # Fix that by using +Olibmerrno if the compiler recognizes it.
-
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${CC} supports +Olibmerrno, for CFLAGS" >&5
-$as_echo_n "checking whether ${CC} supports +Olibmerrno, for CFLAGS... " >&6; }
-if ${pgac_cv_prog_CC_cflags_pOlibmerrno+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- pgac_save_CFLAGS=$CFLAGS
-pgac_save_CC=$CC
-CC=${CC}
-CFLAGS="${CFLAGS} +Olibmerrno"
-ac_save_c_werror_flag=$ac_c_werror_flag
-ac_c_werror_flag=yes
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-int
-main ()
-{
-
- ;
- return 0;
-}
-_ACEOF
-if ac_fn_c_try_compile "$LINENO"; then :
- pgac_cv_prog_CC_cflags_pOlibmerrno=yes
-else
- pgac_cv_prog_CC_cflags_pOlibmerrno=no
-fi
-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
-ac_c_werror_flag=$ac_save_c_werror_flag
-CFLAGS="$pgac_save_CFLAGS"
-CC="$pgac_save_CC"
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_prog_CC_cflags_pOlibmerrno" >&5
-$as_echo "$pgac_cv_prog_CC_cflags_pOlibmerrno" >&6; }
-if test x"$pgac_cv_prog_CC_cflags_pOlibmerrno" = x"yes"; then
- CFLAGS="${CFLAGS} +Olibmerrno"
-fi
-
-
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${CXX} supports +Olibmerrno, for CXXFLAGS" >&5
-$as_echo_n "checking whether ${CXX} supports +Olibmerrno, for CXXFLAGS... " >&6; }
-if ${pgac_cv_prog_CXX_cxxflags_pOlibmerrno+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- pgac_save_CXXFLAGS=$CXXFLAGS
-pgac_save_CXX=$CXX
-CXX=${CXX}
-CXXFLAGS="${CXXFLAGS} +Olibmerrno"
-ac_save_cxx_werror_flag=$ac_cxx_werror_flag
-ac_cxx_werror_flag=yes
-ac_ext=cpp
-ac_cpp='$CXXCPP $CPPFLAGS'
-ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
-
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-int
-main ()
-{
-
- ;
- return 0;
-}
-_ACEOF
-if ac_fn_cxx_try_compile "$LINENO"; then :
- pgac_cv_prog_CXX_cxxflags_pOlibmerrno=yes
-else
- pgac_cv_prog_CXX_cxxflags_pOlibmerrno=no
-fi
-rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
-ac_ext=c
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_c_compiler_gnu
-
-ac_cxx_werror_flag=$ac_save_cxx_werror_flag
-CXXFLAGS="$pgac_save_CXXFLAGS"
-CXX="$pgac_save_CXX"
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_prog_CXX_cxxflags_pOlibmerrno" >&5
-$as_echo "$pgac_cv_prog_CXX_cxxflags_pOlibmerrno" >&6; }
-if test x"$pgac_cv_prog_CXX_cxxflags_pOlibmerrno" = x"yes"; then
- CXXFLAGS="${CXXFLAGS} +Olibmerrno"
-fi
-
-
fi
@@ -13823,7 +13728,7 @@ $as_echo "#define HAVE_STDBOOL_H 1" >>confdefs.h
fi
-for ac_header in atomic.h copyfile.h execinfo.h getopt.h ifaddrs.h langinfo.h mbarrier.h poll.h sys/epoll.h sys/event.h sys/ipc.h sys/personality.h sys/prctl.h sys/procctl.h sys/pstat.h sys/resource.h sys/select.h sys/sem.h sys/shm.h sys/signalfd.h sys/sockio.h sys/tas.h sys/uio.h sys/un.h termios.h ucred.h wctype.h
+for ac_header in atomic.h copyfile.h execinfo.h getopt.h ifaddrs.h langinfo.h mbarrier.h poll.h sys/epoll.h sys/event.h sys/ipc.h sys/personality.h sys/prctl.h sys/procctl.h sys/resource.h sys/select.h sys/sem.h sys/shm.h sys/signalfd.h sys/sockio.h sys/tas.h sys/uio.h sys/un.h termios.h ucred.h wctype.h
do :
as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
@@ -15987,7 +15892,7 @@ fi
LIBS_including_readline="$LIBS"
LIBS=`echo "$LIBS" | sed -e 's/-ledit//g' -e 's/-lreadline//g'`
-for ac_func in backtrace_symbols clock_gettime copyfile fdatasync getifaddrs getpeerucred getrlimit inet_pton kqueue mbstowcs_l memset_s poll posix_fallocate ppoll pstat pthread_is_threaded_np readlink readv setproctitle setproctitle_fast setsid shm_open strchrnul strsignal symlink syncfs sync_file_range uselocale wcstombs_l writev
+for ac_func in backtrace_symbols clock_gettime copyfile fdatasync getifaddrs getpeerucred getrlimit inet_pton kqueue mbstowcs_l memset_s poll posix_fallocate ppoll pthread_is_threaded_np readlink readv setproctitle setproctitle_fast setsid shm_open strchrnul strsignal symlink syncfs sync_file_range uselocale wcstombs_l writev
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
diff --git a/configure.ac b/configure.ac
index 6c6f997ee3..7fbfb6795f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -67,7 +67,6 @@ case $host_os in
darwin*) template=darwin ;;
dragonfly*) template=netbsd ;;
freebsd*) template=freebsd ;;
- hpux*) template=hpux ;;
linux*|gnu*|k*bsd*-gnu)
template=linux ;;
mingw*) template=win32 ;;
@@ -570,11 +569,6 @@ elif test "$PORTNAME" = "aix"; then
PGAC_PROG_CXX_CFLAGS_OPT([-qnoansialias])
PGAC_PROG_CC_CFLAGS_OPT([-qlonglong])
PGAC_PROG_CXX_CFLAGS_OPT([-qlonglong])
-elif test "$PORTNAME" = "hpux"; then
- # On some versions of HP-UX, libm functions do not set errno by default.
- # Fix that by using +Olibmerrno if the compiler recognizes it.
- PGAC_PROG_CC_CFLAGS_OPT([+Olibmerrno])
- PGAC_PROG_CXX_CFLAGS_OPT([+Olibmerrno])
fi
AC_SUBST(CFLAGS_UNROLL_LOOPS)
@@ -1452,7 +1446,6 @@ AC_CHECK_HEADERS(m4_normalize([
sys/personality.h
sys/prctl.h
sys/procctl.h
- sys/pstat.h
sys/resource.h
sys/select.h
sys/sem.h
@@ -1801,7 +1794,6 @@ AC_CHECK_FUNCS(m4_normalize([
poll
posix_fallocate
ppoll
- pstat
pthread_is_threaded_np
readlink
readv
diff --git a/doc/src/sgml/dfunc.sgml b/doc/src/sgml/dfunc.sgml
index a635767621..7bdf7f6070 100644
--- a/doc/src/sgml/dfunc.sgml
+++ b/doc/src/sgml/dfunc.sgml
@@ -75,35 +75,6 @@ gcc -shared -o foo.so foo.o
</listitem>
</varlistentry>
- <varlistentry>
- <term>
- <systemitem class="osname">HP-UX</systemitem>
- <indexterm><primary>HP-UX</primary><secondary>shared library</secondary></indexterm>
- </term>
- <listitem>
- <para>
- The compiler flag of the system compiler to create
- <acronym>PIC</acronym> is <option>+z</option>. When using
- <application>GCC</application> it's <option>-fPIC</option>. The
- linker flag for shared libraries is <option>-b</option>. So:
-<programlisting>
-cc +z -c foo.c
-</programlisting>
- or:
-<programlisting>
-gcc -fPIC -c foo.c
-</programlisting>
- and then:
-<programlisting>
-ld -b -o foo.sl foo.o
-</programlisting>
- <systemitem class="osname">HP-UX</systemitem> uses the extension
- <filename>.sl</filename> for shared libraries, unlike most other
- systems.
- </para>
- </listitem>
- </varlistentry>
-
<varlistentry>
<term>
<systemitem class="osname">Linux</systemitem>
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index c585078029..6ab3a65e48 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -1974,7 +1974,6 @@ build-postgresql:
shared libraries. The systems on which this is
<emphasis>not</emphasis> necessary include
<systemitem class="osname">FreeBSD</systemitem>,
- <systemitem class="osname">HP-UX</systemitem>,
<systemitem class="osname">Linux</systemitem>,
<systemitem class="osname">NetBSD</systemitem>, <systemitem
class="osname">OpenBSD</systemitem>, and
@@ -2137,7 +2136,7 @@ export MANPATH
<para>
<productname>PostgreSQL</productname> can be expected to work on these operating
systems: Linux (all recent distributions), Windows (XP and later),
- FreeBSD, OpenBSD, NetBSD, macOS, AIX, HP/UX, and Solaris.
+ FreeBSD, OpenBSD, NetBSD, macOS, AIX, and Solaris.
Other Unix-like systems may also work but are not currently
being tested. In most cases, all CPU architectures supported by
a given operating system will work. Look in
diff --git a/doc/src/sgml/regress.sgml b/doc/src/sgml/regress.sgml
index 952139fc60..8f032c4e7a 100644
--- a/doc/src/sgml/regress.sgml
+++ b/doc/src/sgml/regress.sgml
@@ -689,13 +689,13 @@ testname:output:platformpattern=comparisonfilename
Therefore, we provide a variant comparison file,
<filename>float4-misrounded-input.out</filename>, which includes
the results to be expected on these systems. To silence the bogus
- <quote>failure</quote> message on <systemitem>HP-UX 10</systemitem>
+ <quote>failure</quote> message on <systemitem>Cygwin</systemitem>
platforms, <filename>resultmap</filename> includes:
<programlisting>
-float4:out:hppa.*-hp-hpux10.*=float4-misrounded-input.out
+float4:out:.*-.*-cygwin.*=float4-misrounded-input.out
</programlisting>
which will trigger on any machine where the output of
- <command>config.guess</command> matches <literal>hppa.*-hp-hpux10.*</literal>.
+ <command>config.guess</command> matches <literal>.*-.*-cygwin.*</literal>.
Other lines in <filename>resultmap</filename> select the variant comparison
file for other platforms where it's appropriate.
</para>
diff --git a/doc/src/sgml/runtime.sgml b/doc/src/sgml/runtime.sgml
index 2352389ab6..92a1ea87d8 100644
--- a/doc/src/sgml/runtime.sgml
+++ b/doc/src/sgml/runtime.sgml
@@ -1018,25 +1018,6 @@ psql: error: connection to server on socket "/tmp/.s.PGSQL.5432" failed: No such
</listitem>
</varlistentry>
- <varlistentry>
- <term><systemitem class="osname">HP-UX</systemitem>
- <indexterm><primary>HP-UX</primary><secondary>IPC configuration</secondary></indexterm>
- </term>
- <listitem>
- <para>
- The default settings tend to suffice for normal installations.
- </para>
- <para>
- <acronym>IPC</acronym> parameters can be set in the <application>System
- Administration Manager</application> (<acronym>SAM</acronym>) under
- <menuchoice><guimenu>Kernel
- Configuration</guimenu><guimenuitem>Configurable Parameters</guimenuitem></menuchoice>. Choose
- <guibutton>Create A New Kernel</guibutton> when you're done.
- </para>
- </listitem>
- </varlistentry>
-
-
<varlistentry>
<term><systemitem class="osname">Linux</systemitem>
<indexterm><primary>Linux</primary><secondary>IPC configuration</secondary></indexterm>
diff --git a/src/Makefile.shlib b/src/Makefile.shlib
index 551023c6fb..a7606bc5d9 100644
--- a/src/Makefile.shlib
+++ b/src/Makefile.shlib
@@ -177,39 +177,6 @@ ifeq ($(PORTNAME), netbsd)
endif
endif
-ifeq ($(PORTNAME), hpux)
- ifdef SO_MAJOR_VERSION
- shlib = lib$(NAME)$(DLSUFFIX).$(SO_MAJOR_VERSION)
- endif
- ifeq ($(with_gnu_ld), yes)
- LINK.shared = $(CC) -shared -Wl,-Bsymbolic
- ifdef soname
- LINK.shared += -Wl,-h -Wl,$(soname)
- endif
- else
- LINK.shared = $(LD) -b -Bsymbolic
- ifdef soname
- LINK.shared += +h $(soname)
- endif
- # can't use the CC-syntax rpath pattern here, so instead:
- rpath =
- ifeq ($(enable_rpath), yes)
- LINK.shared += +s +b '$(rpathdir)'
- endif
- # On HPUX platforms, gcc is usually configured to search for libraries
- # in /usr/local/lib, but ld won't do so. Add an explicit -L switch so
- # ld can find the same libraries gcc does. Make sure it goes after any
- # -L switches provided explicitly.
- ifeq ($(GCC), yes)
- SHLIB_LINK += -L/usr/local/lib
- endif
- endif
- # And we need to link with libgcc, too
- ifeq ($(GCC), yes)
- SHLIB_LINK += `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- endif
-endif
-
ifeq ($(PORTNAME), linux)
LINK.shared = $(COMPILER) -shared
ifdef soname
diff --git a/src/backend/libpq/ifaddr.c b/src/backend/libpq/ifaddr.c
index a41808aff0..5494c9b303 100644
--- a/src/backend/libpq/ifaddr.c
+++ b/src/backend/libpq/ifaddr.c
@@ -333,17 +333,11 @@ pg_foreach_ifaddr(PgIfAddrCallback callback, void *cb_data)
#endif
/*
- * SIOCGIFCONF does not return IPv6 addresses on Solaris
- * and HP/UX. So we prefer SIOCGLIFCONF if it's available.
- *
- * On HP/UX, however, it *only* returns IPv6 addresses,
- * and the structs are named slightly differently too.
- * We'd have to do another call with SIOCGIFCONF to get the
- * IPv4 addresses as well. We don't currently bother, just
- * fall back to SIOCGIFCONF on HP/UX.
+ * SIOCGIFCONF does not return IPv6 addresses on Solaris.
+ * So we prefer SIOCGLIFCONF if it's available.
*/
-#if defined(SIOCGLIFCONF) && !defined(__hpux)
+#if defined(SIOCGLIFCONF)
/*
* Enumerate the system's network interface addresses and call the callback
diff --git a/src/backend/port/hpux/tas.c.template b/src/backend/port/hpux/tas.c.template
deleted file mode 100644
index 5ccbbcde9a..0000000000
--- a/src/backend/port/hpux/tas.c.template
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * tas() for HPPA.
- *
- * To generate tas.s using this template:
- * 1. cc +O2 -S -c tas.c
- * 2. edit tas.s:
- * - replace the LDW with LDCWX
- * 3. install as src/backend/port/tas/hpux_hppa.s.
- *
- * For details about the LDCWX instruction, see the "Precision
- * Architecture and Instruction Reference Manual" (09740-90014 of June
- * 1987), p. 5-38.
- */
-
-int
-tas(lock)
- int *lock; /* LDCWX is a word instruction */
-{
- /*
- * LDCWX requires that we align the "semaphore" to a 16-byte
- * boundary. The actual datum is a single word (4 bytes).
- */
- lock = ((uintptr_t) lock + 15) & ~15;
-
- /*
- * The LDCWX instruction atomically clears the target word and
- * returns the previous value. Hence, if the instruction returns
- * 0, someone else has already acquired the lock before we tested
- * it (i.e., we have failed).
- *
- * Notice that this means that we actually clear the word to set
- * the lock and set the word to clear the lock. This is the
- * opposite behavior from the SPARC LDSTUB instruction. For some
- * reason everything that H-P does is rather baroque...
- */
- if (*lock) { /* this generates the LDW */
- return(0); /* success */
- }
- return(1); /* failure */
-}
diff --git a/src/backend/port/tas/hpux_hppa.s b/src/backend/port/tas/hpux_hppa.s
deleted file mode 100644
index d978a7cb03..0000000000
--- a/src/backend/port/tas/hpux_hppa.s
+++ /dev/null
@@ -1,28 +0,0 @@
-
- .SPACE $TEXT$,SORT=8
- .SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=44,CODE_ONLY,SORT=24
-tas
- .PROC
- .CALLINFO CALLER,FRAME=0,ENTRY_SR=3
- .ENTRY
- LDO 15(%r26),%r31 ;offset 0x0
- DEPI 0,31,4,%r31 ;offset 0x4
- LDCWX 0(0,%r31),%r23 ;offset 0x8
- COMICLR,= 0,%r23,%r0 ;offset 0xc
- DEP,TR %r0,31,32,%r28 ;offset 0x10
-$00000001
- LDI 1,%r28 ;offset 0x14
-$L0
- .EXIT
- BV,N %r0(%r2) ;offset 0x18
- .PROCEND ;in=26;out=28;
-
-
- .SPACE $TEXT$
- .SUBSPA $CODE$
- .SPACE $PRIVATE$,SORT=16
- .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=16
- .SPACE $TEXT$
- .SUBSPA $CODE$
- .EXPORT tas,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR
- .END
diff --git a/src/backend/tcop/postgres.c b/src/backend/tcop/postgres.c
index 5ab91c2c58..cbb0ec606f 100644
--- a/src/backend/tcop/postgres.c
+++ b/src/backend/tcop/postgres.c
@@ -3396,7 +3396,7 @@ ProcessInterrupts(void)
/*
* IA64-specific code to fetch the AR.BSP register for stack depth checks.
*
- * We currently support gcc, icc, and HP-UX's native compiler here.
+ * We currently support gcc and icc here.
*
* Note: while icc accepts gcc asm blocks on x86[_64], this is not true on
* ia64 (at least not in icc versions before 12.x). So we have to carry a
@@ -3404,11 +3404,7 @@ ProcessInterrupts(void)
*/
#if defined(__ia64__) || defined(__ia64)
-#if defined(__hpux) && !defined(__GNUC__) && !defined(__INTEL_COMPILER)
-/* Assume it's HP-UX native compiler */
-#include <ia64/sys/inline.h>
-#define ia64_get_bsp() ((char *) (_Asm_mov_from_ar(_AREG_BSP, _NO_FENCE)))
-#elif defined(__INTEL_COMPILER)
+#if defined(__INTEL_COMPILER)
/* icc */
#include <asm/ia64regs.h>
#define ia64_get_bsp() ((char *) __getReg(_IA64_REG_AR_BSP))
diff --git a/src/backend/utils/misc/ps_status.c b/src/backend/utils/misc/ps_status.c
index ec314c03f5..8520ce76bb 100644
--- a/src/backend/utils/misc/ps_status.c
+++ b/src/backend/utils/misc/ps_status.c
@@ -15,9 +15,6 @@
#include "postgres.h"
#include <unistd.h>
-#ifdef HAVE_SYS_PSTAT_H
-#include <sys/pstat.h> /* for HP-UX */
-#endif
#ifdef HAVE_PS_STRINGS
#include <machine/vmparam.h> /* for old BSD */
#include <sys/exec.h>
@@ -45,9 +42,6 @@ bool update_process_title = true;
* PS_USE_SETPROCTITLE
* use the function setproctitle(const char *, ...)
* (newer BSD systems)
- * PS_USE_PSTAT
- * use the pstat(PSTAT_SETCMD, )
- * (HPUX)
* PS_USE_PS_STRINGS
* assign PS_STRINGS->ps_argvstr = "string"
* (some BSD systems)
@@ -67,8 +61,6 @@ bool update_process_title = true;
#define PS_USE_SETPROCTITLE_FAST
#elif defined(HAVE_SETPROCTITLE)
#define PS_USE_SETPROCTITLE
-#elif defined(HAVE_PSTAT) && defined(PSTAT_SETCMD)
-#define PS_USE_PSTAT
#elif defined(HAVE_PS_STRINGS)
#define PS_USE_PS_STRINGS
#elif (defined(BSD) || defined(__hurd__)) && !defined(__darwin__)
@@ -376,15 +368,6 @@ set_ps_display(const char *activity)
setproctitle_fast("%s", ps_buffer);
#endif
-#ifdef PS_USE_PSTAT
- {
- union pstun pst;
-
- pst.pst_command = ps_buffer;
- pstat(PSTAT_SETCMD, pst, ps_buffer_cur_len, 0, 0);
- }
-#endif /* PS_USE_PSTAT */
-
#ifdef PS_USE_PS_STRINGS
PS_STRINGS->ps_nargvstr = 1;
PS_STRINGS->ps_argvstr = ps_buffer;
diff --git a/src/common/sprompt.c b/src/common/sprompt.c
index 8b836846e3..5ad90f59bb 100644
--- a/src/common/sprompt.c
+++ b/src/common/sprompt.c
@@ -90,7 +90,7 @@ simple_prompt_extended(const char *prompt, bool echo,
/*
* Do not try to collapse these into one "w+" mode file. Doesn't work on
- * some platforms (eg, HPUX 10.20).
+ * some platforms.
*/
termin = fopen("/dev/tty", "r");
termout = fopen("/dev/tty", "w");
diff --git a/src/include/pg_config.h.in b/src/include/pg_config.h.in
index cdd742cb55..7133c3dc66 100644
--- a/src/include/pg_config.h.in
+++ b/src/include/pg_config.h.in
@@ -430,9 +430,6 @@
/* Define to 1 if you have the `pread' function. */
#undef HAVE_PREAD
-/* Define to 1 if you have the `pstat' function. */
-#undef HAVE_PSTAT
-
/* Define to 1 if the PS_STRINGS thing exists. */
#undef HAVE_PS_STRINGS
@@ -625,9 +622,6 @@
/* Define to 1 if you have the <sys/procctl.h> header file. */
#undef HAVE_SYS_PROCCTL_H
-/* Define to 1 if you have the <sys/pstat.h> header file. */
-#undef HAVE_SYS_PSTAT_H
-
/* Define to 1 if you have the <sys/resource.h> header file. */
#undef HAVE_SYS_RESOURCE_H
diff --git a/src/include/port/atomics.h b/src/include/port/atomics.h
index 9550e04aaa..33b7fd6042 100644
--- a/src/include/port/atomics.h
+++ b/src/include/port/atomics.h
@@ -95,8 +95,6 @@
#include "port/atomics/generic-gcc.h"
#elif defined(_MSC_VER)
#include "port/atomics/generic-msvc.h"
-#elif defined(__hpux) && defined(__ia64) && !defined(__GNUC__)
-#include "port/atomics/generic-acc.h"
#elif defined(__SUNPRO_C) && !defined(__GNUC__)
#include "port/atomics/generic-sunpro.h"
#else
diff --git a/src/include/port/atomics/arch-ia64.h b/src/include/port/atomics/arch-ia64.h
index 771bac1f3e..264d2316b9 100644
--- a/src/include/port/atomics/arch-ia64.h
+++ b/src/include/port/atomics/arch-ia64.h
@@ -21,8 +21,6 @@
# define pg_memory_barrier_impl() __mf()
#elif defined(__GNUC__)
# define pg_memory_barrier_impl() __asm__ __volatile__ ("mf" : : : "memory")
-#elif defined(__hpux)
-# define pg_memory_barrier_impl() _Asm_mf()
#endif
/* per architecture manual doubleword accesses have single copy atomicity */
diff --git a/src/include/port/atomics/fallback.h b/src/include/port/atomics/fallback.h
index 1cdef5f2f6..91a9be4828 100644
--- a/src/include/port/atomics/fallback.h
+++ b/src/include/port/atomics/fallback.h
@@ -93,7 +93,7 @@ typedef struct pg_atomic_flag
typedef struct pg_atomic_uint32
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
+#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
int sema[4];
#else
int sema;
@@ -111,7 +111,7 @@ typedef struct pg_atomic_uint32
typedef struct pg_atomic_uint64
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
+#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
int sema[4];
#else
int sema;
diff --git a/src/include/port/atomics/generic-acc.h b/src/include/port/atomics/generic-acc.h
deleted file mode 100644
index 842b2dec6e..0000000000
--- a/src/include/port/atomics/generic-acc.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * generic-acc.h
- * Atomic operations support when using HPs acc on HPUX
- *
- * Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * Documentation:
- * * inline assembly for Itanium-based HP-UX:
- * http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/inline_assem_ERS.pdf
- * * Implementing Spinlocks on the Intel (R) Itanium (R) Architecture and PA-RISC
- * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
- *
- * Itanium only supports a small set of numbers (6, -8, -4, -1, 1, 4, 8, 16)
- * for atomic add/sub, so we just implement everything but compare_exchange
- * via the compare_exchange fallbacks in atomics/generic.h.
- *
- * src/include/port/atomics/generic-acc.h
- *
- * -------------------------------------------------------------------------
- */
-
-#include <machine/sys/inline.h>
-
-#define pg_compiler_barrier_impl() _Asm_sched_fence()
-
-#if defined(HAVE_ATOMICS)
-
-/* IA64 always has 32/64 bit atomics */
-
-#define PG_HAVE_ATOMIC_U32_SUPPORT
-typedef struct pg_atomic_uint32
-{
- volatile uint32 value;
-} pg_atomic_uint32;
-
-#define PG_HAVE_ATOMIC_U64_SUPPORT
-typedef struct pg_atomic_uint64
-{
- /*
- * Alignment is guaranteed to be 64bit. Search for "Well-behaved
- * application restrictions" => "Data alignment and data sharing" on HP's
- * website. Unfortunately the URL doesn't seem to stable enough to
- * include.
- */
- volatile uint64 value;
-} pg_atomic_uint64;
-
-
-#define MINOR_FENCE (_Asm_fence) (_UP_CALL_FENCE | _UP_SYS_FENCE | \
- _DOWN_CALL_FENCE | _DOWN_SYS_FENCE )
-
-#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U32
-static inline bool
-pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
- uint32 *expected, uint32 newval)
-{
- bool ret;
- uint32 current;
-
- _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
- /*
- * We want a barrier, not just release/acquire semantics.
- */
- _Asm_mf();
- /*
- * Notes:
- * _DOWN_MEM_FENCE | _UP_MEM_FENCE prevents reordering by the compiler
- */
- current = _Asm_cmpxchg(_SZ_W, /* word */
- _SEM_REL,
- &ptr->value,
- newval, _LDHINT_NONE,
- _DOWN_MEM_FENCE | _UP_MEM_FENCE);
- ret = current == *expected;
- *expected = current;
- return ret;
-}
-
-
-#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U64
-static inline bool
-pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr,
- uint64 *expected, uint64 newval)
-{
- bool ret;
- uint64 current;
-
- _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
- _Asm_mf();
- current = _Asm_cmpxchg(_SZ_D, /* doubleword */
- _SEM_REL,
- &ptr->value,
- newval, _LDHINT_NONE,
- _DOWN_MEM_FENCE | _UP_MEM_FENCE);
- ret = current == *expected;
- *expected = current;
- return ret;
-}
-
-#undef MINOR_FENCE
-
-#endif /* defined(HAVE_ATOMICS) */
diff --git a/src/include/port/hpux.h b/src/include/port/hpux.h
deleted file mode 100644
index 4d1dcea70c..0000000000
--- a/src/include/port/hpux.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* src/include/port/hpux.h */
-
-/* nothing needed */
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 98b4d718d2..1e1eb324b4 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -765,44 +765,14 @@ tas(volatile slock_t *lock)
typedef unsigned char slock_t;
#endif
-/*
- * Default implementation of S_UNLOCK() for gcc/icc.
- *
- * Note that this implementation is unsafe for any platform that can reorder
- * a memory access (either load or store) after a following store. That
- * happens not to be possible on x86 and most legacy architectures (some are
- * single-processor!), but many modern systems have weaker memory ordering.
- * Those that do must define their own version of S_UNLOCK() rather than
- * relying on this one.
- */
-#if !defined(S_UNLOCK)
-#define S_UNLOCK(lock) \
- do { __asm__ __volatile__("" : : : "memory"); *(lock) = 0; } while (0)
-#endif
-
-#endif /* defined(__GNUC__) || defined(__INTEL_COMPILER) */
-
-
-/*
- * ---------------------------------------------------------------------
- * Platforms that use non-gcc inline assembly:
- * ---------------------------------------------------------------------
- */
-
-#if !defined(HAS_TEST_AND_SET) /* We didn't trigger above, let's try here */
-
-
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
+#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
/*
* HP's PA-RISC
*
- * See src/backend/port/hpux/tas.c.template for details about LDCWX. Because
- * LDCWX requires a 16-byte-aligned address, we declare slock_t as a 16-byte
- * struct. The active word in the struct is whichever has the aligned address;
- * the other three words just sit at -1.
- *
- * When using gcc, we can inline the required assembly code.
+ * Because LDCWX requires a 16-byte-aligned address, we declare slock_t as a
+ * 16-byte struct. The active word in the struct is whichever has the aligned
+ * address; the other three words just sit at -1.
*/
#define HAS_TEST_AND_SET
@@ -813,14 +783,27 @@ typedef struct
#define TAS_ACTIVE_WORD(lock) ((volatile int *) (((uintptr_t) (lock) + 15) & ~15))
-#if defined(__GNUC__)
-
static __inline__ int
tas(volatile slock_t *lock)
{
volatile int *lockword = TAS_ACTIVE_WORD(lock);
register int lockval;
+ /*
+ * The LDCWX instruction atomically clears the target word and
+ * returns the previous value. Hence, if the instruction returns
+ * 0, someone else has already acquired the lock before we tested
+ * it (i.e., we have failed).
+ *
+ * Notice that this means that we actually clear the word to set
+ * the lock and set the word to clear the lock. This is the
+ * opposite behavior from the SPARC LDSTUB instruction. For some
+ * reason everything that H-P does is rather baroque...
+ *
+ * For details about the LDCWX instruction, see the "Precision
+ * Architecture and Instruction Reference Manual" (09740-90014 of June
+ * 1987), p. 5-38.
+ */
__asm__ __volatile__(
" ldcwx 0(0,%2),%0 \n"
: "=r"(lockval), "+m"(*lockword)
@@ -829,23 +812,12 @@ tas(volatile slock_t *lock)
return (lockval == 0);
}
-/*
- * The hppa implementation doesn't follow the rules of this files and provides
- * a gcc specific implementation outside of the above defined(__GNUC__). It
- * does so to avoid duplication between the HP compiler and gcc. So undefine
- * the generic fallback S_UNLOCK from above.
- */
-#ifdef S_UNLOCK
-#undef S_UNLOCK
-#endif
#define S_UNLOCK(lock) \
do { \
__asm__ __volatile__("" : : : "memory"); \
*TAS_ACTIVE_WORD(lock) = -1; \
} while (0)
-#endif /* __GNUC__ */
-
#define S_INIT_LOCK(lock) \
do { \
volatile slock_t *lock_ = (lock); \
@@ -860,32 +832,31 @@ tas(volatile slock_t *lock)
#endif /* __hppa || __hppa__ */
-#if defined(__hpux) && defined(__ia64) && !defined(__GNUC__)
/*
- * HP-UX on Itanium, non-gcc/icc compiler
- *
- * We assume that the compiler enforces strict ordering of loads/stores on
- * volatile data (see comments on the gcc-version earlier in this file).
- * Note that this assumption does *not* hold if you use the
- * +Ovolatile=__unordered option on the HP-UX compiler, so don't do that.
+ * Default implementation of S_UNLOCK() for gcc/icc.
*
- * See also Implementing Spinlocks on the Intel Itanium Architecture and
- * PA-RISC, by Tor Ekqvist and David Graves, for more information. As of
- * this writing, version 1.0 of the manual is available at:
- * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
+ * Note that this implementation is unsafe for any platform that can reorder
+ * a memory access (either load or store) after a following store. That
+ * happens not to be possible on x86 and most legacy architectures (some are
+ * single-processor!), but many modern systems have weaker memory ordering.
+ * Those that do must define their own version of S_UNLOCK() rather than
+ * relying on this one.
*/
-#define HAS_TEST_AND_SET
+#if !defined(S_UNLOCK)
+#define S_UNLOCK(lock) \
+ do { __asm__ __volatile__("" : : : "memory"); *(lock) = 0; } while (0)
+#endif
-typedef unsigned int slock_t;
+#endif /* defined(__GNUC__) || defined(__INTEL_COMPILER) */
-#include <ia64/sys/inline.h>
-#define TAS(lock) _Asm_xchg(_SZ_W, lock, 1, _LDHINT_NONE)
-/* On IA64, it's a win to use a non-locking test before the xchg proper */
-#define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))
-#define S_UNLOCK(lock) \
- do { _Asm_mf(); (*(lock)) = 0; } while (0)
-#endif /* HPUX on IA64, non gcc/icc */
+/*
+ * ---------------------------------------------------------------------
+ * Platforms that use non-gcc inline assembly:
+ * ---------------------------------------------------------------------
+ */
+
+#if !defined(HAS_TEST_AND_SET) /* We didn't trigger above, let's try here */
#if defined(_AIX) /* AIX */
/*
diff --git a/src/makefiles/Makefile.hpux b/src/makefiles/Makefile.hpux
deleted file mode 100644
index 25e036bd8d..0000000000
--- a/src/makefiles/Makefile.hpux
+++ /dev/null
@@ -1,47 +0,0 @@
-# Using X/Open Networking Interfaces requires to link with libxnet.
-# Without specifying this, bind(), getpeername() and so on don't work
-# correctly in the LP64 data model.
-LIBS := -lxnet $(LIBS)
-
-# Set up rpath so that the executables don't need SHLIB_PATH to be set.
-# (Note: --disable-rpath is a really bad idea on this platform...)
-ifeq ($(with_gnu_ld), yes)
- rpath = -Wl,-rpath -Wl,'$(rpathdir)'
-else
- rpath = -Wl,+b -Wl,'$(rpathdir)'
-endif
-
-# catch null pointer dereferences
-ifeq ($(with_gnu_ld), yes)
-# XXX what to put here?
-else
- LDFLAGS_EX += -Wl,-z
-endif
-
-# set up appropriate options for shared library builds
-export_dynamic = -Wl,-E
-
-INSTALL_SHLIB_OPTS = -m 555
-
-AROPT = crs
-
-# env var name to use in place of LD_LIBRARY_PATH
-ld_library_path_var = SHLIB_PATH
-
-# Rule for building a shared library from a single .o file
-%$(DLSUFFIX): %.o
-ifeq ($(GCC), yes)
- ifeq ($(with_gnu_ld), yes)
- $(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@ `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- else
- $(LD) -b -o $@ $< `$(CC) $(LDFLAGS) -print-libgcc-file-name`
- endif
-else
- ifeq ($(with_gnu_ld), yes)
- $(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@
- else
- $(LD) -b -o $@ $<
- endif
-endif
-
-sqlmansect = 5
diff --git a/src/pl/plperl/ppport.h b/src/pl/plperl/ppport.h
index 1f6cf465df..762dd362b3 100644
--- a/src/pl/plperl/ppport.h
+++ b/src/pl/plperl/ppport.h
@@ -12160,7 +12160,7 @@ DPPP_(my_newCONSTSUB)(HV *stash, const char *name, SV *sv)
STMT_START { \
ASSUME(!"UNREACHABLE"); __builtin_unreachable(); \
} STMT_END
-# elif ! defined(__GNUC__) && (defined(__sun) || defined(__hpux))
+# elif ! defined(__GNUC__) && defined(__sun)
# define NOT_REACHED
# else
# define NOT_REACHED ASSUME(!"UNREACHABLE")
diff --git a/src/port/dlopen.c b/src/port/dlopen.c
index d441dc8196..6ff9f4bf64 100644
--- a/src/port/dlopen.c
+++ b/src/port/dlopen.c
@@ -15,55 +15,7 @@
#include "c.h"
-#if defined(__hpux)
-
-/* System includes */
-#include <a.out.h>
-#include <dl.h>
-
-void *
-dlopen(const char *file, int mode)
-{
- int flags = 0;
-
- if (mode & RTLD_NOW)
- flags |= BIND_IMMEDIATE;
-#ifdef NOT_USED
- if (mode & RTLD_LAZY)
- flags |= BIND_DEFERRED;
-#endif
-
- return shl_load(file, flags | BIND_VERBOSE, 0L);
-}
-
-void *
-dlsym(void *handle, const char *symbol)
-{
- void *value;
-
- if (shl_findsym((shl_t *) & handle, symbol, TYPE_PROCEDURE, &value) == -1)
- return NULL;
- return value;
-}
-
-int
-dlclose(void *handle)
-{
- return shl_unload((shl_t) handle);
-}
-
-char *
-dlerror(void)
-{
- static char errmsg[] = "shl_load failed";
-
- if (errno)
- return strerror(errno);
-
- return errmsg;
-}
-
-#elif defined(WIN32)
+#if defined(WIN32)
static char last_dyn_error[512];
diff --git a/src/port/getrusage.c b/src/port/getrusage.c
index 8369fd2793..02665f4032 100644
--- a/src/port/getrusage.c
+++ b/src/port/getrusage.c
@@ -20,7 +20,6 @@
/* This code works on:
* solaris_i386
* solaris_sparc
- * hpux 9.*
* win32
* which currently is all the supported platforms that don't have a
* native version of getrusage(). So, if configure decides to compile
diff --git a/src/template/hpux b/src/template/hpux
deleted file mode 100644
index 5105a74c78..0000000000
--- a/src/template/hpux
+++ /dev/null
@@ -1,34 +0,0 @@
-# src/template/hpux
-
-# Need this for access to many modern library features
-CPPFLAGS="$CPPFLAGS -D_XOPEN_SOURCE_EXTENDED"
-
-# HP's compiler likes the spelling +O2 not -O2, so adjust default CFLAGS
-if test "$GCC" != yes ; then
- CFLAGS="+O2"
-fi
-
-# Extra CFLAGS for code that will go into a shared library
-if test "$GCC" = yes ; then
- CFLAGS_SL="-fPIC"
-else
- CFLAGS_SL="+Z"
-fi
-
-# Pick right test-and-set (TAS) code. We need out-of-line assembler
-# when not using gcc.
-case $host in
- hppa*-*-hpux*)
- if test "$GCC" != yes ; then
- need_tas=yes
- tas_file=hpux_hppa.s
- fi
- ;;
-esac
-
-case $host_cpu in
- ia64)
- DLSUFFIX=".so";;
- *)
- DLSUFFIX=".sl";;
-esac
diff --git a/src/test/regress/resultmap b/src/test/regress/resultmap
index c766d03df2..8a3ed50585 100644
--- a/src/test/regress/resultmap
+++ b/src/test/regress/resultmap
@@ -1,3 +1,2 @@
float4:out:.*-.*-cygwin.*=float4-misrounded-input.out
float4:out:.*-.*-mingw.*=float4-misrounded-input.out
-float4:out:hppa.*-hp-hpux10.*=float4-misrounded-input.out
diff --git a/src/tools/msvc/Solution.pm b/src/tools/msvc/Solution.pm
index d30e8fcb11..52ff56ba83 100644
--- a/src/tools/msvc/Solution.pm
+++ b/src/tools/msvc/Solution.pm
@@ -337,7 +337,6 @@ sub GenerateFiles
HAVE_PPC_LWARX_MUTEX_HINT => undef,
HAVE_PPOLL => undef,
HAVE_PREAD => undef,
- HAVE_PSTAT => undef,
HAVE_PS_STRINGS => undef,
HAVE_PTHREAD => undef,
HAVE_PTHREAD_BARRIER_WAIT => undef,
@@ -401,7 +400,6 @@ sub GenerateFiles
HAVE_SYS_PERSONALITY_H => undef,
HAVE_SYS_PRCTL_H => undef,
HAVE_SYS_PROCCTL_H => undef,
- HAVE_SYS_PSTAT_H => undef,
HAVE_SYS_RESOURCE_H => undef,
HAVE_SYS_SELECT_H => undef,
HAVE_SYS_SEM_H => undef,
diff --git a/src/tools/pginclude/cpluspluscheck b/src/tools/pginclude/cpluspluscheck
index 42688fff53..7b54726175 100755
--- a/src/tools/pginclude/cpluspluscheck
+++ b/src/tools/pginclude/cpluspluscheck
@@ -63,7 +63,6 @@ do
test "$f" = src/include/port/cygwin.h && continue
test "$f" = src/include/port/darwin.h && continue
test "$f" = src/include/port/freebsd.h && continue
- test "$f" = src/include/port/hpux.h && continue
test "$f" = src/include/port/linux.h && continue
test "$f" = src/include/port/netbsd.h && continue
test "$f" = src/include/port/openbsd.h && continue
diff --git a/src/tools/pginclude/headerscheck b/src/tools/pginclude/headerscheck
index f8b0674a66..225224a9bc 100755
--- a/src/tools/pginclude/headerscheck
+++ b/src/tools/pginclude/headerscheck
@@ -59,7 +59,6 @@ do
test "$f" = src/include/port/cygwin.h && continue
test "$f" = src/include/port/darwin.h && continue
test "$f" = src/include/port/freebsd.h && continue
- test "$f" = src/include/port/hpux.h && continue
test "$f" = src/include/port/linux.h && continue
test "$f" = src/include/port/netbsd.h && continue
test "$f" = src/include/port/openbsd.h && continue
--
2.36.1
v3-0002-Remove-HP-Intel-Itanium-support.patchapplication/x-patch; name=v3-0002-Remove-HP-Intel-Itanium-support.patchDownload
From 814771ccab310c34f83ea8709236405425f34015 Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Wed, 6 Jul 2022 16:29:05 +1200
Subject: [PATCH v3 2/2] Remove HP/Intel Itanium support.
This CPU architecture has been discontinued.
Reviewed-by: Andres Freund <andres@anarazel.de>
Discussion: https://postgr.es/m/1415825.1656893299%40sss.pgh.pa.us
---
doc/src/sgml/installation.sgml | 2 +-
src/backend/tcop/postgres.c | 71 ----------------------------
src/include/miscadmin.h | 8 ----
src/include/port/atomics.h | 2 -
src/include/port/atomics/arch-ia64.h | 27 -----------
src/include/storage/s_lock.h | 65 -------------------------
src/tools/pginclude/cpluspluscheck | 1 -
src/tools/pginclude/headerscheck | 1 -
8 files changed, 1 insertion(+), 176 deletions(-)
delete mode 100644 src/include/port/atomics/arch-ia64.h
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index 6ab3a65e48..704ba2761e 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -2125,7 +2125,7 @@ export MANPATH
<para>
In general, <productname>PostgreSQL</productname> can be expected to work on
- these CPU architectures: x86, x86_64, IA64, PowerPC,
+ these CPU architectures: x86, x86_64, PowerPC,
PowerPC 64, S/390, S/390x, Sparc, Sparc 64, ARM, MIPS, MIPSEL,
and PA-RISC. Code support exists for M68K, M32R, and VAX, but these
architectures are not known to have been tested recently. It is often
diff --git a/src/backend/tcop/postgres.c b/src/backend/tcop/postgres.c
index cbb0ec606f..6f18b68856 100644
--- a/src/backend/tcop/postgres.c
+++ b/src/backend/tcop/postgres.c
@@ -132,13 +132,6 @@ static long max_stack_depth_bytes = 100 * 1024L;
*/
static char *stack_base_ptr = NULL;
-/*
- * On IA64 we also have to remember the register stack base.
- */
-#if defined(__ia64__) || defined(__ia64)
-static char *register_stack_base_ptr = NULL;
-#endif
-
/*
* Flag to keep track of whether we have started a transaction.
* For extended query protocol this has to be remembered across messages.
@@ -3392,41 +3385,6 @@ ProcessInterrupts(void)
ProcessLogMemoryContextInterrupt();
}
-
-/*
- * IA64-specific code to fetch the AR.BSP register for stack depth checks.
- *
- * We currently support gcc and icc here.
- *
- * Note: while icc accepts gcc asm blocks on x86[_64], this is not true on
- * ia64 (at least not in icc versions before 12.x). So we have to carry a
- * separate implementation for it.
- */
-#if defined(__ia64__) || defined(__ia64)
-
-#if defined(__INTEL_COMPILER)
-/* icc */
-#include <asm/ia64regs.h>
-#define ia64_get_bsp() ((char *) __getReg(_IA64_REG_AR_BSP))
-#else
-/* gcc */
-static __inline__ char *
-ia64_get_bsp(void)
-{
- char *ret;
-
- /* the ;; is a "stop", seems to be required before fetching BSP */
- __asm__ __volatile__(
- ";;\n"
- " mov %0=ar.bsp \n"
-: "=r"(ret));
-
- return ret;
-}
-#endif
-#endif /* IA64 */
-
-
/*
* set_stack_base: set up reference point for stack depth checking
*
@@ -3440,12 +3398,7 @@ set_stack_base(void)
#endif
pg_stack_base_t old;
-#if defined(__ia64__) || defined(__ia64)
- old.stack_base_ptr = stack_base_ptr;
- old.register_stack_base_ptr = register_stack_base_ptr;
-#else
old = stack_base_ptr;
-#endif
/*
* Set up reference point for stack depth checking. On recent gcc we use
@@ -3457,9 +3410,6 @@ set_stack_base(void)
#else
stack_base_ptr = &stack_base;
#endif
-#if defined(__ia64__) || defined(__ia64)
- register_stack_base_ptr = ia64_get_bsp();
-#endif
return old;
}
@@ -3476,12 +3426,7 @@ set_stack_base(void)
void
restore_stack_base(pg_stack_base_t base)
{
-#if defined(__ia64__) || defined(__ia64)
- stack_base_ptr = base.stack_base_ptr;
- register_stack_base_ptr = base.register_stack_base_ptr;
-#else
stack_base_ptr = base;
-#endif
}
/*
@@ -3538,22 +3483,6 @@ stack_is_too_deep(void)
stack_base_ptr != NULL)
return true;
- /*
- * On IA64 there is a separate "register" stack that requires its own
- * independent check. For this, we have to measure the change in the
- * "BSP" pointer from PostgresMain to here. Logic is just as above,
- * except that we know IA64's register stack grows up.
- *
- * Note we assume that the same max_stack_depth applies to both stacks.
- */
-#if defined(__ia64__) || defined(__ia64)
- stack_depth = (long) (ia64_get_bsp() - register_stack_base_ptr);
-
- if (stack_depth > max_stack_depth_bytes &&
- register_stack_base_ptr != NULL)
- return true;
-#endif /* IA64 */
-
return false;
}
diff --git a/src/include/miscadmin.h b/src/include/miscadmin.h
index 0af130fbc5..ea9a56d395 100644
--- a/src/include/miscadmin.h
+++ b/src/include/miscadmin.h
@@ -279,15 +279,7 @@ extern PGDLLIMPORT bool VacuumCostActive;
/* in tcop/postgres.c */
-#if defined(__ia64__) || defined(__ia64)
-typedef struct
-{
- char *stack_base_ptr;
- char *register_stack_base_ptr;
-} pg_stack_base_t;
-#else
typedef char *pg_stack_base_t;
-#endif
extern pg_stack_base_t set_stack_base(void);
extern void restore_stack_base(pg_stack_base_t base);
diff --git a/src/include/port/atomics.h b/src/include/port/atomics.h
index 33b7fd6042..f7cd0f6f20 100644
--- a/src/include/port/atomics.h
+++ b/src/include/port/atomics.h
@@ -68,8 +68,6 @@
#include "port/atomics/arch-arm.h"
#elif defined(__i386__) || defined(__i386) || defined(__x86_64__)
#include "port/atomics/arch-x86.h"
-#elif defined(__ia64__) || defined(__ia64)
-#include "port/atomics/arch-ia64.h"
#elif defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(__powerpc64__)
#include "port/atomics/arch-ppc.h"
#elif defined(__hppa) || defined(__hppa__)
diff --git a/src/include/port/atomics/arch-ia64.h b/src/include/port/atomics/arch-ia64.h
deleted file mode 100644
index 264d2316b9..0000000000
--- a/src/include/port/atomics/arch-ia64.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * arch-ia64.h
- * Atomic operations considerations specific to intel itanium
- *
- * Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * src/include/port/atomics/arch-ia64.h
- *
- *-------------------------------------------------------------------------
- */
-
-/*
- * Itanium is weakly ordered, so read and write barriers require a full
- * fence.
- */
-#if defined(__INTEL_COMPILER)
-# define pg_memory_barrier_impl() __mf()
-#elif defined(__GNUC__)
-# define pg_memory_barrier_impl() __asm__ __volatile__ ("mf" : : : "memory")
-#endif
-
-/* per architecture manual doubleword accesses have single copy atomicity */
-#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 1e1eb324b4..c4a19b2f43 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -250,71 +250,6 @@ spin_delay(void)
#endif /* __x86_64__ */
-#if defined(__ia64__) || defined(__ia64)
-/*
- * Intel Itanium, gcc or Intel's compiler.
- *
- * Itanium has weak memory ordering, but we rely on the compiler to enforce
- * strict ordering of accesses to volatile data. In particular, while the
- * xchg instruction implicitly acts as a memory barrier with 'acquire'
- * semantics, we do not have an explicit memory fence instruction in the
- * S_UNLOCK macro. We use a regular assignment to clear the spinlock, and
- * trust that the compiler marks the generated store instruction with the
- * ".rel" opcode.
- *
- * Testing shows that assumption to hold on gcc, although I could not find
- * any explicit statement on that in the gcc manual. In Intel's compiler,
- * the -m[no-]serialize-volatile option controls that, and testing shows that
- * it is enabled by default.
- *
- * While icc accepts gcc asm blocks on x86[_64], this is not true on ia64
- * (at least not in icc versions before 12.x). So we have to carry a separate
- * compiler-intrinsic-based implementation for it.
- */
-#define HAS_TEST_AND_SET
-
-typedef unsigned int slock_t;
-
-#define TAS(lock) tas(lock)
-
-/* On IA64, it's a win to use a non-locking test before the xchg proper */
-#define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))
-
-#ifndef __INTEL_COMPILER
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- long int ret;
-
- __asm__ __volatile__(
- " xchg4 %0=%1,%2 \n"
-: "=r"(ret), "+m"(*lock)
-: "r"(1)
-: "memory");
- return (int) ret;
-}
-
-#else /* __INTEL_COMPILER */
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- int ret;
-
- ret = _InterlockedExchange(lock,1); /* this is a xchg asm macro */
-
- return ret;
-}
-
-/* icc can't use the regular gcc S_UNLOCK() macro either in this case */
-#define S_UNLOCK(lock) \
- do { __memory_barrier(); *(lock) = 0; } while (0)
-
-#endif /* __INTEL_COMPILER */
-#endif /* __ia64__ || __ia64 */
-
-
/*
* On ARM and ARM64, we use __sync_lock_test_and_set(int *, int) if available.
*
diff --git a/src/tools/pginclude/cpluspluscheck b/src/tools/pginclude/cpluspluscheck
index 7b54726175..3137cddf11 100755
--- a/src/tools/pginclude/cpluspluscheck
+++ b/src/tools/pginclude/cpluspluscheck
@@ -81,7 +81,6 @@ do
# relevant to our platform will be included by atomics.h.
test "$f" = src/include/port/atomics/arch-arm.h && continue
test "$f" = src/include/port/atomics/arch-hppa.h && continue
- test "$f" = src/include/port/atomics/arch-ia64.h && continue
test "$f" = src/include/port/atomics/arch-ppc.h && continue
test "$f" = src/include/port/atomics/arch-x86.h && continue
test "$f" = src/include/port/atomics/fallback.h && continue
diff --git a/src/tools/pginclude/headerscheck b/src/tools/pginclude/headerscheck
index 225224a9bc..ee4e593263 100755
--- a/src/tools/pginclude/headerscheck
+++ b/src/tools/pginclude/headerscheck
@@ -77,7 +77,6 @@ do
# relevant to our platform will be included by atomics.h.
test "$f" = src/include/port/atomics/arch-arm.h && continue
test "$f" = src/include/port/atomics/arch-hppa.h && continue
- test "$f" = src/include/port/atomics/arch-ia64.h && continue
test "$f" = src/include/port/atomics/arch-ppc.h && continue
test "$f" = src/include/port/atomics/arch-x86.h && continue
test "$f" = src/include/port/atomics/fallback.h && continue
--
2.36.1
Hi,
0001 looks good to me.
There's a leftover itanium reference in a comment in
src/include/port/atomics/generic-msvc.h
There's also a bunch of #ifdef __ia64__ in src/backend/utils/misc/guc-file.c,
contrib/seg/segscan.c and contrib/cube/cubescan.c
Otherwise lgtm as well.
Greetings,
Andres Freund
Andres Freund <andres@anarazel.de> writes:
There's also a bunch of #ifdef __ia64__ in src/backend/utils/misc/guc-file.c,
contrib/seg/segscan.c and contrib/cube/cubescan.c
And all our other flex output files --- AFAICS that's part of flex's
recipe and not under our control.
regards, tom lane
On 2022-07-06 01:33:58 -0400, Tom Lane wrote:
Andres Freund <andres@anarazel.de> writes:
There's also a bunch of #ifdef __ia64__ in src/backend/utils/misc/guc-file.c,
contrib/seg/segscan.c and contrib/cube/cubescan.cAnd all our other flex output files --- AFAICS that's part of flex's
recipe and not under our control.
Clearly I need to stop reviewing things for the rest of the day :)
On 06.07.22 04:21, Thomas Munro wrote:
/*
* Do not try to collapse these into one "w+" mode file. Doesn't work on
- * some platforms (eg, HPUX 10.20).
+ * some platforms.
*/
termin = fopen("/dev/tty", "r");
termout = fopen("/dev/tty", "w");
I don't know how /dev/tty behaves in detail under stdio. I think
removing this part of the comment might leave the impression that
attempting to use "w+" will never work, whereas the existing comment
appears to indicate that it was only very old platforms that had the
issue. If we don't have an immediate answer to that, I'd leave the
comment as is.
Peter Eisentraut <peter.eisentraut@enterprisedb.com> writes:
On 06.07.22 04:21, Thomas Munro wrote:
/*
* Do not try to collapse these into one "w+" mode file. Doesn't work on
- * some platforms (eg, HPUX 10.20).
+ * some platforms.
*/
termin = fopen("/dev/tty", "r");
termout = fopen("/dev/tty", "w");
I don't know how /dev/tty behaves in detail under stdio. I think
removing this part of the comment might leave the impression that
attempting to use "w+" will never work, whereas the existing comment
appears to indicate that it was only very old platforms that had the
issue. If we don't have an immediate answer to that, I'd leave the
comment as is.
Yeah, I was kind of wondering whether we should give w+ a try now.
IIRC, the code was like that at one point, but we had to change it
(ie the comment comes from bitter experience). On the other hand,
it's probably not worth the trouble and risk to change it again.
regards, tom lane
I wrote:
Our HEAD does work on that NetBSD installation. I can try this
patch, but it'll take an hour or two to get results ... stay tuned.
Indeed, I still get a clean build and "make check" passes with
this patch.
regards, tom lane
On Sat, Jul 2, 2022 at 2:34 PM Andres Freund <andres@anarazel.de> wrote:
I strikes me as a remarkably bad idea to manually try to maintain the correct
alignment. Even with the tests added it's still quite manual and requires
contorted struct layouts (see e.g. [1]).I think we should either teach our system the correct alignment rules or we
should drop AIX support.
I raised this same issue at
/messages/by-id/CA+TgmoaK377MXCWJqEXM3VvKDDC-frNUMKb=7u07TJa59wTAeQ@mail.gmail.com
and discussion ensued from there. I agree that manually maintaining
alignment, even with a regression test to help, is a really bad plan.
The rule about columns of type "name" can be relaxed easily enough,
just by insisting that NAMEDATALEN must be a multiple of 8. As Tom
also said on this thread, adding such a constraint seems to have no
real downside. But the problem has a second aspect not related to
NameData, which is that int64 and double have different alignment
requirements on that platform. To get out from under that part of it,
it seems we either need to de-support AIX and any other platforms that
have such a discrepancy, or else have separate typalign values for
int64-align vs. double-align.
From a theoretical point of view, I think what we're doing now is
pretty unprincipled. I've always found it a bit surprising that we get
away with just assuming that a bunch of various different primitive
data types are all going to have the same alignment requirement. The
purist in me feels that it would be better to have separate typalign
values for things that aren't guaranteed to behave the same. However,
there's a practical difficulty with that approach: if the only
operating system where this issue occurs in practice is AIX, I feel
it's going to be pretty hard for us to keep the code that caters to
this unusual situation working properly. And I'd rather have no code
for it at all than have code which doesn't really work.
--
Robert Haas
EDB: http://www.enterprisedb.com
Hi,
On 2022-07-06 11:55:57 -0400, Robert Haas wrote:
On Sat, Jul 2, 2022 at 2:34 PM Andres Freund <andres@anarazel.de> wrote:
I strikes me as a remarkably bad idea to manually try to maintain the correct
alignment. Even with the tests added it's still quite manual and requires
contorted struct layouts (see e.g. [1]).I think we should either teach our system the correct alignment rules or we
should drop AIX support.I raised this same issue at
/messages/by-id/CA+TgmoaK377MXCWJqEXM3VvKDDC-frNUMKb=7u07TJa59wTAeQ@mail.gmail.com
and discussion ensued from there. I agree that manually maintaining
alignment, even with a regression test to help, is a really bad plan.The rule about columns of type "name" can be relaxed easily enough,
just by insisting that NAMEDATALEN must be a multiple of 8. As Tom
also said on this thread, adding such a constraint seems to have no
real downside. But the problem has a second aspect not related to
NameData, which is that int64 and double have different alignment
requirements on that platform. To get out from under that part of it,
it seems we either need to de-support AIX and any other platforms that
have such a discrepancy, or else have separate typalign values for
int64-align vs. double-align.
I think my proposal of introducing a version of double that is marked to be 8
byte aligned should do the trick as well, and doesn't have the problem of
changing the meaning of 'double' references in external headers. In fact, we
already have float8 as a type, so we could just add it there.
We don't currently have a float8 in the catalogs afaics, but I think it'd be
better to not rely on that.
It's not pretty, but still seems a lot better than doing this stuff manually.
From a theoretical point of view, I think what we're doing now is
pretty unprincipled. I've always found it a bit surprising that we get
away with just assuming that a bunch of various different primitive
data types are all going to have the same alignment requirement. The
purist in me feels that it would be better to have separate typalign
values for things that aren't guaranteed to behave the same. However,
there's a practical difficulty with that approach: if the only
operating system where this issue occurs in practice is AIX, I feel
it's going to be pretty hard for us to keep the code that caters to
this unusual situation working properly. And I'd rather have no code
for it at all than have code which doesn't really work.
The problem with having a lot more alignment values is that it adds a bunch of
overhead to very performance critical paths. We don't want to add more
branches to att_align_nominal() if we can avoid it.
I guess we can try to introduce TYPALIGN_INT64 and then hide the relevant
branch with an ifdef for the common case of TYPALIGN_INT64 == TYPALIGN_DOUBLE.
I'm fairly certain that we're going to add a lot more 64bit ints to catalogs
in the next few years, so this will become a bigger issue over time...
Outside of the catalogs I still think that we should work towards not aligning
byval values (and instead memcpy-ing the values to deal with alignment
sensitive platforms), so we don't waste so much space. And for catalogs we've
been talking about giving up the struct mapping as well, in the thread about
variable length names. In which case we could the cost of handling more
alignment values wouldn't be incurred as frequently.
Greetings,
Andres Freund
On Wed, Jul 6, 2022 at 12:27 PM Andres Freund <andres@anarazel.de> wrote:
I think my proposal of introducing a version of double that is marked to be 8
byte aligned should do the trick as well, and doesn't have the problem of
changing the meaning of 'double' references in external headers. In fact, we
already have float8 as a type, so we could just add it there.
Yeah, but how easily will it be to know whether we've used that in
every relevant place?
Could we insist on 8-byte alignment even on 32-bit platforms? I think
we have a few of those in the buildfarm, so maybe that would help us
spot problems. Although I'm not sure how, exactly.
The problem with having a lot more alignment values is that it adds a bunch of
overhead to very performance critical paths. We don't want to add more
branches to att_align_nominal() if we can avoid it.
Fair.
I'm fairly certain that we're going to add a lot more 64bit ints to catalogs
in the next few years, so this will become a bigger issue over time...
Absolutely.
Outside of the catalogs I still think that we should work towards not aligning
byval values (and instead memcpy-ing the values to deal with alignment
sensitive platforms), so we don't waste so much space. And for catalogs we've
been talking about giving up the struct mapping as well, in the thread about
variable length names. In which case we could the cost of handling more
alignment values wouldn't be incurred as frequently.
+1. Aligning stuff on disk appears to have few redeeming properties
for the amount of pain it causes.
--
Robert Haas
EDB: http://www.enterprisedb.com
On Thu, Jul 7, 2022 at 1:02 AM Peter Eisentraut
<peter.eisentraut@enterprisedb.com> wrote:
On 06.07.22 04:21, Thomas Munro wrote:
/* * Do not try to collapse these into one "w+" mode file. Doesn't work on - * some platforms (eg, HPUX 10.20). + * some platforms. */ termin = fopen("/dev/tty", "r"); termout = fopen("/dev/tty", "w");I don't know how /dev/tty behaves in detail under stdio. I think
removing this part of the comment might leave the impression that
attempting to use "w+" will never work, whereas the existing comment
appears to indicate that it was only very old platforms that had the
issue. If we don't have an immediate answer to that, I'd leave the
comment as is.
Thanks. I put that bit back, removed the stray mention of "itanium"
in Windows-specific stuff that Andres mentioned, and pushed these
patches.
While adjusting the docs, I noticed a few little inconsistencies here
and there for other ISAs.
* The documented list of ISAs should by now mention RISC-V. I'm sure
it needs some fine tuning but it's working fine and tested by the
build farm.
* The documented list mentions some in different endiannesses and word
sizes explicitly but not others; I think it'd be tidier to list the
main architecture names and then tack on a "big and little endian, 32
and 64 bit" sentence.
* Under "code exists, not tested" we mentioned M68K, M32R, VAX, but
M88K and SuperH are also in that category and have been added/tweaked
in the past decade with reports that imply that they were working on
retro-gear. AFAIK only SuperH-family stuff is still produced. I
don't know much about that and I'm not planning to change anything,
except one special mention...
* Since Greg Stark's magnificent Vax talk[1]https://archive.fosdem.org/2016/schedule/event/postgresql_on_vax/, we became even more
dependent on IEEE 754 via the Ryu algorithm. AFAICT, unless someone
produces a software IEEE math implementation for GCC/VAX... if I had
a pick one to bump off that list, that's the easiest to argue because
it definitely doesn't work.
* When we removed Alpha we left a couple of traces.
What do you think about the attached?
[1]: https://archive.fosdem.org/2016/schedule/event/postgresql_on_vax/
Attachments:
0001-Tidy-up-claimed-supported-CPUs.patchtext/x-patch; charset=US-ASCII; name=0001-Tidy-up-claimed-supported-CPUs.patchDownload
From 3f8dc52fdec8a9a09017d9542d84d78715ec0223 Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Fri, 8 Jul 2022 10:19:32 +1200
Subject: [PATCH] Tidy up claimed supported CPUs.
* Be more consistent about listing endianness and bitness variants.
* Mentioned RISC-V.
* SuperH and M88K might as well be mentioned, if M68K is.
* VAX definitely doesn't work anymore, so remove it from docs and code.
* Remaining traces of Alpha support can also be removed from code.
---
contrib/pgcrypto/crypt-blowfish.c | 2 +-
doc/src/sgml/installation.sgml | 7 ++++---
src/include/storage/s_lock.h | 30 ------------------------------
3 files changed, 5 insertions(+), 34 deletions(-)
diff --git a/contrib/pgcrypto/crypt-blowfish.c b/contrib/pgcrypto/crypt-blowfish.c
index a663852ccf..1264eccb3f 100644
--- a/contrib/pgcrypto/crypt-blowfish.c
+++ b/contrib/pgcrypto/crypt-blowfish.c
@@ -41,7 +41,7 @@
#ifdef __i386__
#define BF_ASM 0 /* 1 */
#define BF_SCALE 1
-#elif defined(__x86_64__) || defined(__alpha__) || defined(__hppa__)
+#elif defined(__x86_64__) || defined(__hppa__)
#define BF_ASM 0
#define BF_SCALE 1
#else
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index 1a1343a008..eff180b216 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -2125,9 +2125,10 @@ export MANPATH
<para>
In general, <productname>PostgreSQL</productname> can be expected to work on
- these CPU architectures: x86, x86_64, PowerPC,
- PowerPC 64, S/390, S/390x, Sparc, Sparc 64, ARM, MIPS, MIPSEL,
- and PA-RISC. Code support exists for M68K, M32R, and VAX, but these
+ these CPU architectures: x86, PowerPC, S/390, Sparc, ARM, MIPS, RISC-V,
+ and PA-RISC.
+ Big-endian, little-endian, 32-bit and 64-bit systems are supported.
+ Code support exists for M68K, M88K, M32R, and SuperH, but these
architectures are not known to have been tested recently. It is often
possible to build on an unsupported CPU type by configuring with
<option>--disable-spinlocks</option>, but performance will be poor.
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index c4a19b2f43..1f5394ef7f 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -548,36 +548,6 @@ tas(volatile slock_t *lock)
#endif /* __m88k__ */
-/*
- * VAXen -- even multiprocessor ones
- * (thanks to Tom Ivar Helbekkmo)
- */
-#if defined(__vax__)
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register int _res;
-
- __asm__ __volatile__(
- " movl $1, %0 \n"
- " bbssi $0, (%2), 1f \n"
- " clrl %0 \n"
- "1: \n"
-: "=&r"(_res), "+m"(*lock)
-: "r"(lock)
-: "memory");
- return _res;
-}
-
-#endif /* __vax__ */
-
-
#if defined(__mips__) && !defined(__sgi) /* non-SGI MIPS */
#define HAS_TEST_AND_SET
--
2.30.2
Thomas Munro <thomas.munro@gmail.com> writes:
* The documented list mentions some in different endiannesses and word
sizes explicitly but not others; I think it'd be tidier to list the
main architecture names and then tack on a "big and little endian, 32
and 64 bit" sentence.
As phrased, this seems to be saying that we can do both
endiannesses on any of the supported arches, which is a little
weird considering that most of them are single-endianness. It's
not a big deal, but maybe a tad more word-smithing there would
help?
* Since Greg Stark's magnificent Vax talk[1], we became even more
dependent on IEEE 754 via the Ryu algorithm. AFAICT, unless someone
produces a software IEEE math implementation for GCC/VAX... if I had
a pick one to bump off that list, that's the easiest to argue because
it definitely doesn't work.
Agreed. In principle I'd wish that we were not tied to one
floating-point format, but the benefits of Ryu are too hard to
pass up; and reality on the ground is that IEEE 754 achieved
total victory a couple decades ago. We should stop claiming
that VAX is a realistic target platform.
What do you think about the attached?
WFM. Also, that crypt-blowfish.c hunk offers an answer to
your question about whether to worry about "__hppa".
regards, tom lane
On Thu, 7 Jul 2022 at 22:36, Thomas Munro <thomas.munro@gmail.com> wrote:
* Since Greg Stark's magnificent Vax talk[1], we became even more
dependent on IEEE 754 via the Ryu algorithm. AFAICT, unless someone
produces a software IEEE math implementation for GCC/VAX... if I had
a pick one to bump off that list, that's the easiest to argue because
it definitely doesn't work.
Yeah that's definitely true. I think you could possibly build with a
software fp implementation but then you would have to recompile libc
and any other libraries as well.
If it was worth spending a lot of effort we could perhaps separate the
Float4/Float8 data type from the core C code floating point and
compile with just the former using soft floats but use native floats
for core code. That's probably way more effort than it's worth for VAX
but it would conceivably be worthwhile if it helped for running on
some embedded platform but I don't think so since they would
presumably be using soft floats everywhere anyways.
--
greg
On Tue, Jul 5, 2022 at 1:32 AM Andres Freund <andres@anarazel.de> wrote:
I just thought an easier way - why don't we introduce a 'catalog_double'
that's defined to be pg_attribute_aligned(whatever-we-need) on AIX? Then we
can get rid of the manually enforced alignedness and we don't need to contort
catalog order.
I investigated this a little bit today. It seems that
att_align_nominal() thinks that typalign=='d' means ALIGNOF_DOUBLE,
which on AIX is 4. So I think what we would need to do first is
redefine typalign=='d' to mean alignment to MAXIMUM_ALIGNOF. If we
don't do that, then there's no automatic way to get uint64 fields to
be placed on 8-byte boundaries, which it requires. Such a change would
have no effect on many systems, but if as on AIX double requires less
alignment than either "long" or "long long int", it will break on-disk
compatibility and in particular pg_upgrade compatibility.
If we did that, then we could pursue your proposal above. Rather than
creating an altogether new typedef, we could just apply
pg_attribute_aligned(MAXIMUM_ALIGNOF) to the existing typedef for
float8, which is documented as being the name that should be used in
the catalogs, and is. Since pg_attribute_aligned() is not supported on
all platforms, we elsewhere apply it conditionally, so we would
presumably do the same thing here. That would mean that it might fail
to apply on some platform somewhere, but we could compensate for that
by adding a static assertion checking that if we do struct
float8_alignmment_test { char pad; float8 x; } then
alignof(float8_alignment_test, x) == MAXIMUM_ALIGNOF. That way, if
pg_attribute_aligned() isn't supported but the platform doesn't have
this issue in the first place, all is well. If pg_attribute_aligned()
isn't supported and the platform does have this issue, compilation
will fail.
In theory, we could have the same issue with int64 on some other
platform. On this hypothetical system, ALIGNOF_LONG_LONG_INT <
ALIGNOF_DOUBLE. The compile would then align int64 catalog columns on,
say, 4-byte boundaries, but our tuple deforming code would think that
they were aligned to 8 byte boundaries. We could fix that by forcing
the int64 type to have maximum alignment as well or introducing a new
typedef that does. However, such a fix could probably be postponed
until such time as a system of this kind turns up. It might never
happen.
--
Robert Haas
EDB: http://www.enterprisedb.com
On Fri, Jul 8, 2022 at 4:24 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
Thomas Munro <thomas.munro@gmail.com> writes:
* The documented list mentions some in different endiannesses and word
sizes explicitly but not others; I think it'd be tidier to list the
main architecture names and then tack on a "big and little endian, 32
and 64 bit" sentence.As phrased, this seems to be saying that we can do both
endiannesses on any of the supported arches, which is a little
weird considering that most of them are single-endianness. It's
not a big deal, but maybe a tad more word-smithing there would
help?
OK, I word-smothe thusly:
+ and PA-RISC, including
+ big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
I also realised that we should list a couple more OSes (we know they
work, they are automatically tested). Then I wondered why we bother
to state a Windows version here. For consistency, we could list the
minimum Linux kernel, and so on for every other OS, but that's silly
for such brief and general documentation. So I propose that we just
say "current versions of ..." and remove the bit about Windows 10.
Attachments:
v2-0001-Tidy-up-claimed-supported-CPUs-and-OSes.patchtext/x-patch; charset=US-ASCII; name=v2-0001-Tidy-up-claimed-supported-CPUs-and-OSes.patchDownload
From 395e31b5ddb142230b9ffaf60af1f56fea46383d Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Fri, 8 Jul 2022 10:19:32 +1200
Subject: [PATCH v2] Tidy up claimed supported CPUs and OSes.
* Remove arbitrary mention of certain endianness and bitness variants;
it's enough to say that applicable variants are expected to work.
* List RISC-V (known to work, being tested).
* List SuperH and M88K (code exists, unknown status, like M68K).
* De-list VAX and remove code (known not to work).
* Remove stray traces of Alpha (support was removed years ago).
* List illumos, DragonFlyBSD (known to work, being tested).
* No need to single Windows out by listing a specific version, when we
don't do that for other OSes; it's enough to say that we support
current versions of the listed OSes (when PG16 ships, that'll be
Windows 10+).
Reviewed-by: Tom Lane <tgl@sss.pgh.pa.us>
Reviewed-by: Greg Stark <stark@mit.edu>
Discussion: https://postgr.es/m/CA%2BhUKGKk7NZO1UnJM0PyixcZPpCGqjBXW_0bzFZpJBGAf84XKg%40mail.gmail.com
---
contrib/pgcrypto/crypt-blowfish.c | 2 +-
doc/src/sgml/installation.sgml | 13 +++++++------
src/include/storage/s_lock.h | 30 ------------------------------
3 files changed, 8 insertions(+), 37 deletions(-)
diff --git a/contrib/pgcrypto/crypt-blowfish.c b/contrib/pgcrypto/crypt-blowfish.c
index a663852ccf..1264eccb3f 100644
--- a/contrib/pgcrypto/crypt-blowfish.c
+++ b/contrib/pgcrypto/crypt-blowfish.c
@@ -41,7 +41,7 @@
#ifdef __i386__
#define BF_ASM 0 /* 1 */
#define BF_SCALE 1
-#elif defined(__x86_64__) || defined(__alpha__) || defined(__hppa__)
+#elif defined(__x86_64__) || defined(__hppa__)
#define BF_ASM 0
#define BF_SCALE 1
#else
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index 1a1343a008..09cd9d8b9c 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -2125,18 +2125,19 @@ export MANPATH
<para>
In general, <productname>PostgreSQL</productname> can be expected to work on
- these CPU architectures: x86, x86_64, PowerPC,
- PowerPC 64, S/390, S/390x, Sparc, Sparc 64, ARM, MIPS, MIPSEL,
- and PA-RISC. Code support exists for M68K, M32R, and VAX, but these
+ these CPU architectures: x86, PowerPC, S/390, Sparc, ARM, MIPS, RISC-V,
+ and PA-RISC, including
+ big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
+ Code support exists for M68K, M88K, M32R, and SuperH, but these
architectures are not known to have been tested recently. It is often
possible to build on an unsupported CPU type by configuring with
<option>--disable-spinlocks</option>, but performance will be poor.
</para>
<para>
- <productname>PostgreSQL</productname> can be expected to work on these operating
- systems: Linux (all recent distributions), Windows (10 and later),
- FreeBSD, OpenBSD, NetBSD, macOS, AIX, and Solaris.
+ <productname>PostgreSQL</productname> can be expected to work on current
+ versions of these operating systems: Linux (all recent distributions), Windows,
+ FreeBSD, OpenBSD, NetBSD, DragonFlyBSD, macOS, AIX, Solaris, and illumos.
Other Unix-like systems may also work but are not currently
being tested. In most cases, all CPU architectures supported by
a given operating system will work. Look in
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index c4a19b2f43..1f5394ef7f 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -548,36 +548,6 @@ tas(volatile slock_t *lock)
#endif /* __m88k__ */
-/*
- * VAXen -- even multiprocessor ones
- * (thanks to Tom Ivar Helbekkmo)
- */
-#if defined(__vax__)
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register int _res;
-
- __asm__ __volatile__(
- " movl $1, %0 \n"
- " bbssi $0, (%2), 1f \n"
- " clrl %0 \n"
- "1: \n"
-: "=&r"(_res), "+m"(*lock)
-: "r"(lock)
-: "memory");
- return _res;
-}
-
-#endif /* __vax__ */
-
-
#if defined(__mips__) && !defined(__sgi) /* non-SGI MIPS */
#define HAS_TEST_AND_SET
--
2.36.1
Thomas Munro <thomas.munro@gmail.com> writes:
OK, I word-smothe thusly:
+ and PA-RISC, including + big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
WFM. I also wonder if in
+ <productname>PostgreSQL</productname> can be expected to work on current
+ versions of these operating systems: Linux (all recent distributions), Windows,
+ FreeBSD, OpenBSD, NetBSD, DragonFlyBSD, macOS, AIX, Solaris, and illumos.
we could drop "(all recent distributions)", figuring that "current
versions" covers that already. Other than that niggle, this
looks good to me.
regards, tom lane
On Mon, Jul 11, 2022 at 11:38 AM Tom Lane <tgl@sss.pgh.pa.us> wrote:
WFM. I also wonder if in
+ <productname>PostgreSQL</productname> can be expected to work on current + versions of these operating systems: Linux (all recent distributions), Windows, + FreeBSD, OpenBSD, NetBSD, DragonFlyBSD, macOS, AIX, Solaris, and illumos.we could drop "(all recent distributions)", figuring that "current
versions" covers that already. Other than that niggle, this
looks good to me.
Yeah. I wasn't too sure if that was mostly about "recent" or mostly
about "all distributions" but it wasn't doing much. Thanks, pushed.
Thomas Munro <thomas.munro@gmail.com> writes:
Yeah. I wasn't too sure if that was mostly about "recent" or mostly
about "all distributions" but it wasn't doing much. Thanks, pushed.
While we're here ...
+ Code support exists for M68K, M88K, M32R, and SuperH, but these
architectures are not known to have been tested recently.
I confess great fondness for M68K, having spent a goodly chunk of
the eighties hacking M68K assembly code. However, of these four
architectures, I fear only SuperH has anything resembling a
detectable pulse. According to Wikipedia:
* Motorola ended development of M68K in 1994. The last processors
had clock rates around 75MHz (and this was a CISC architecture,
so instruction rates were a good bit less). Considering how
depressingly slow my late-90s 360MHz HPPA box is, it's impossible
to believe that anyone wants to run PG on M68K today.
* M88K was introduced in 1988 and discontinued in 1991. Max clock
rate was apparently somewhere under 100MHz, and in any case it's
hard to believe that any remain alive in the wild.
* M32R ... hard to tell for sure, because Wikipedia's only concrete
info is a link to a 404 page at renasas.com. But they do say that
the Linux kernel dropped support for it some years ago.
SuperH might be twitching a bit less feebly than these three,
but it seems to be a legacy architecture as well. Not much
has happened there since the early 2000's AFAICS.
I think it'd be pretty reasonable to disclaim support for
any architecture that doesn't have a representative in our
buildfarm, which would lead to dropping all four of these.
If you don't like it, step up and run a buildfarm animal.
(The same policy could be applied to operating systems,
but it looks like we're good on that side.)
regards, tom lane
On Mon, Jul 11, 2022 at 6:49 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
SuperH might be twitching a bit less feebly than these three,
but it seems to be a legacy architecture as well. Not much
has happened there since the early 2000's AFAICS.
It looks like there's an sh3el package for PostgreSQL on NetBSD here,
so whoever maintains that might be in touch:
https://ftp.netbsd.org/pub/pkgsrc/current/pkgsrc/databases/postgresql14-server/index.html
I think it'd be pretty reasonable to disclaim support for
any architecture that doesn't have a representative in our
buildfarm, which would lead to dropping all four of these.
If you don't like it, step up and run a buildfarm animal.
+1
It's funny to think that you probably could run modern PostgreSQL on
the Sun 3 boxes the project started on in 1986 (based on clues from
the papers in our history section) if you put NetBSD on them, but
you'd probably need to cross compile due to lack of RAM. The grammar
in particular.
On Mon, Jul 11, 2022 at 2:49 AM Tom Lane <tgl@sss.pgh.pa.us> wrote:
While we're here ...
+ Code support exists for M68K, M88K, M32R, and SuperH, but these
architectures are not known to have been tested recently.I think it'd be pretty reasonable to disclaim support for
any architecture that doesn't have a representative in our
buildfarm, which would lead to dropping all four of these.
If you don't like it, step up and run a buildfarm animal.
+1. Keeping stuff like this in the documentation doesn't make those
platforms supported. What it does do is make it look like we're bad at
updating our documentation.
I strongly suspect that anyone who tried to use a modern PostgreSQL on
any of these platforms would find it quite an adventure, which is
fine, because if you're trying to use any of those platforms in 2022,
you are probably the sort of person who enjoys an adventure. But it
can't really be useful to list them in the documentation, and it's
unlikely that any of them "just work".
--
Robert Haas
EDB: http://www.enterprisedb.com
Robert Haas <robertmhaas@gmail.com> writes:
On Mon, Jul 11, 2022 at 2:49 AM Tom Lane <tgl@sss.pgh.pa.us> wrote:
I think it'd be pretty reasonable to disclaim support for
any architecture that doesn't have a representative in our
buildfarm, which would lead to dropping all four of these.
If you don't like it, step up and run a buildfarm animal.
I strongly suspect that anyone who tried to use a modern PostgreSQL on
any of these platforms would find it quite an adventure, which is
fine, because if you're trying to use any of those platforms in 2022,
you are probably the sort of person who enjoys an adventure. But it
can't really be useful to list them in the documentation, and it's
unlikely that any of them "just work".
It's possible that they "just work", but we have no way of knowing that,
or knowing if we break them in future. Thus the importance of having
a buildfarm animal to tell us that.
More generally, I think the value of carrying support for niche
architectures is that it helps keep us from falling into the
software-monoculture trap, from which we'd be unable to escape when
the hardware landscape inevitably changes. However, it only helps
if somebody is testing such arches on a regular basis. The fact that
there's some #ifdef'd code somewhere for M88K proves diddly-squat
about whether we could actually run on M88K today. The situation
for niche operating systems is precisely analogous.
regards, tom lane
Thomas Munro <thomas.munro@gmail.com> writes:
On Mon, Jul 11, 2022 at 6:49 PM Tom Lane <tgl@sss.pgh.pa.us> wrote:
SuperH might be twitching a bit less feebly than these three,
but it seems to be a legacy architecture as well. Not much
has happened there since the early 2000's AFAICS.
It looks like there's an sh3el package for PostgreSQL on NetBSD here,
so whoever maintains that might be in touch:
https://ftp.netbsd.org/pub/pkgsrc/current/pkgsrc/databases/postgresql14-server/index.html
Hm. For a moment there I was feeling bad about recommending cutting
off a platform somebody still pays attention to ... but looking at
the relevant NetBSD mailing list archives makes it look like that
port is pretty darn moribund.
It's funny to think that you probably could run modern PostgreSQL on
the Sun 3 boxes the project started on in 1986 (based on clues from
the papers in our history section) if you put NetBSD on them, but
you'd probably need to cross compile due to lack of RAM.
Yeah. I'm wondering if that sh3el package was cross-compiled,
and if so whether it was just part of a mass package build rather
than something somebody was specifically interested in. You'd
have to be a glutton for pain to want to do actual work with PG
on the kind of SH3 hardware that seems to be available.
regards, tom lane
On Tue, Jul 12, 2022 at 7:24 AM Tom Lane <tgl@sss.pgh.pa.us> wrote:
Thomas Munro <thomas.munro@gmail.com> writes:
It's funny to think that you probably could run modern PostgreSQL on
the Sun 3 boxes the project started on in 1986 (based on clues from
the papers in our history section) if you put NetBSD on them, but
you'd probably need to cross compile due to lack of RAM.Yeah. I'm wondering if that sh3el package was cross-compiled,
and if so whether it was just part of a mass package build rather
than something somebody was specifically interested in. You'd
have to be a glutton for pain to want to do actual work with PG
on the kind of SH3 hardware that seems to be available.
/me pictures Stark wheeling a real Sun 3 into a conference room
Yeah, we can always consider putting SuperH back if someone showed up
to maintain/test it. That seems unlikely, but apparently there's an
open source silicon project based on this ISA, so maybe a fast one
isn't impossible...
Here's a patch to remove all of these.
I didn't originally suggest that because of some kind of (mostly
vicarious) nostalgia. I wonder if we should allow ourselves a
paragraph where we remember these systems. I personally think it's
one of the amazing things about this project. Here's what I came up
with, but I'm sure there are more.
Attachments:
0001-Further-tidy-up-for-supported-CPUs.patchtext/x-patch; charset=US-ASCII; name=0001-Further-tidy-up-for-supported-CPUs.patchDownload
From 9c20f8b70632a6a79333c835bcf3f4c7d427f1cf Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Tue, 12 Jul 2022 08:04:46 +1200
Subject: [PATCH 1/2] Further tidy-up for supported CPUs.
Further to commit 92d70b77, let's drop the code we carry for the
following untested architectures: M68K, M88K, M32R, SuperH. We have no
idea if anything actually works there, and surely as vintage hardware
and microcontrollers they would be underpowered for any modern purpose.
We could always consider re-adding SuperH based on modern evidence of
usage and build farm support, if someone shows up to provide it.
While here, SPARC is usually written in all caps.
Discussion: https://postgr.es/m/959917.1657522169%40sss.pgh.pa.us
---
doc/src/sgml/installation.sgml | 5 +-
src/backend/storage/lmgr/s_lock.c | 65 -------------------
src/include/storage/s_lock.h | 102 ------------------------------
3 files changed, 2 insertions(+), 170 deletions(-)
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index dec13eaa93..381b728e08 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -2125,11 +2125,10 @@ export MANPATH
<para>
In general, <productname>PostgreSQL</productname> can be expected to work on
- these CPU architectures: x86, PowerPC, S/390, Sparc, ARM, MIPS, RISC-V,
+ these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS, RISC-V,
and PA-RISC, including
big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
- Code support exists for M68K, M88K, M32R, and SuperH, but these
- architectures are not known to have been tested recently. It is often
+ It is often
possible to build on an unsupported CPU type by configuring with
<option>--disable-spinlocks</option>, but performance will be poor.
</para>
diff --git a/src/backend/storage/lmgr/s_lock.c b/src/backend/storage/lmgr/s_lock.c
index baea773a02..2a658ff594 100644
--- a/src/backend/storage/lmgr/s_lock.c
+++ b/src/backend/storage/lmgr/s_lock.c
@@ -220,71 +220,6 @@ update_spins_per_delay(int shared_spins_per_delay)
}
-/*
- * Various TAS implementations that cannot live in s_lock.h as no inline
- * definition exists (yet).
- * In the future, get rid of tas.[cso] and fold it into this file.
- *
- * If you change something here, you will likely need to modify s_lock.h too,
- * because the definitions for these are split between this file and s_lock.h.
- */
-
-
-#ifdef HAVE_SPINLOCKS /* skip spinlocks if requested */
-
-
-#if defined(__GNUC__)
-
-/*
- * All the gcc flavors that are not inlined
- */
-
-
-/*
- * Note: all the if-tests here probably ought to be testing gcc version
- * rather than platform, but I don't have adequate info to know what to
- * write. Ideally we'd flush all this in favor of the inline version.
- */
-#if defined(__m68k__) && !defined(__linux__)
-/* really means: extern int tas(slock_t* **lock); */
-static void
-tas_dummy()
-{
- __asm__ __volatile__(
-#if (defined(__NetBSD__) || defined(__OpenBSD__)) && defined(__ELF__)
-/* no underscore for label and % for registers */
- "\
-.global tas \n\
-tas: \n\
- movel %sp@(0x4),%a0 \n\
- tas %a0@ \n\
- beq _success \n\
- moveq #-128,%d0 \n\
- rts \n\
-_success: \n\
- moveq #0,%d0 \n\
- rts \n"
-#else
- "\
-.global _tas \n\
-_tas: \n\
- movel sp@(0x4),a0 \n\
- tas a0@ \n\
- beq _success \n\
- moveq #-128,d0 \n\
- rts \n\
-_success: \n\
- moveq #0,d0 \n\
- rts \n"
-#endif /* (__NetBSD__ || __OpenBSD__) && __ELF__ */
- );
-}
-#endif /* __m68k__ && !__linux__ */
-#endif /* not __GNUC__ */
-#endif /* HAVE_SPINLOCKS */
-
-
-
/*****************************************************************************/
#if defined(S_LOCK_TEST)
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 1f5394ef7f..1c9f6f0895 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -498,56 +498,6 @@ do \
#endif /* powerpc */
-/* Linux Motorola 68k */
-#if (defined(__mc68000__) || defined(__m68k__)) && defined(__linux__)
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register int rv;
-
- __asm__ __volatile__(
- " clrl %0 \n"
- " tas %1 \n"
- " sne %0 \n"
-: "=d"(rv), "+m"(*lock)
-: /* no inputs */
-: "memory", "cc");
- return rv;
-}
-
-#endif /* (__mc68000__ || __m68k__) && __linux__ */
-
-
-/* Motorola 88k */
-#if defined(__m88k__)
-#define HAS_TEST_AND_SET
-
-typedef unsigned int slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register slock_t _res = 1;
-
- __asm__ __volatile__(
- " xmem %0, %2, %%r0 \n"
-: "+r"(_res), "+m"(*lock)
-: "r"(lock)
-: "memory");
- return (int) _res;
-}
-
-#endif /* __m88k__ */
-
-
#if defined(__mips__) && !defined(__sgi) /* non-SGI MIPS */
#define HAS_TEST_AND_SET
@@ -619,58 +569,6 @@ do \
#endif /* __mips__ && !__sgi */
-#if defined(__m32r__) && defined(HAVE_SYS_TAS_H) /* Renesas' M32R */
-#define HAS_TEST_AND_SET
-
-#include <sys/tas.h>
-
-typedef int slock_t;
-
-#define TAS(lock) tas(lock)
-
-#endif /* __m32r__ */
-
-
-#if defined(__sh__) /* Renesas' SuperH */
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-
-#define TAS(lock) tas(lock)
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- register int _res;
-
- /*
- * This asm is coded as if %0 could be any register, but actually SuperH
- * restricts the target of xor-immediate to be R0. That's handled by
- * the "z" constraint on _res.
- */
- __asm__ __volatile__(
- " tas.b @%2 \n"
- " movt %0 \n"
- " xor #1,%0 \n"
-: "=z"(_res), "+m"(*lock)
-: "r"(lock)
-: "memory", "t");
- return _res;
-}
-
-#endif /* __sh__ */
-
-
-/* These live in s_lock.c, but only for gcc */
-
-
-#if defined(__m68k__) && !defined(__linux__) /* non-Linux Motorola 68k */
-#define HAS_TEST_AND_SET
-
-typedef unsigned char slock_t;
-#endif
-
-
#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
/*
* HP's PA-RISC
--
2.30.2
0002-Doc-Acknowledge-historically-supported-CPUs-and-OSes.patchtext/x-patch; charset=US-ASCII; name=0002-Doc-Acknowledge-historically-supported-CPUs-and-OSes.patchDownload
From aae902f3eba528e937e56cca08dd3f94bf52c221 Mon Sep 17 00:00:00 2001
From: Thomas Munro <thomas.munro@gmail.com>
Date: Tue, 12 Jul 2022 08:14:40 +1200
Subject: [PATCH 2/2] Doc: Acknowledge historically supported CPUs and OSes.
PostgreSQL/POSTGRES has run on a huge range of CPUs and OSes. As we're
dropping some of the earliest systems the project was founded on, let's
provide a place to remember them.
Discussion: https://postgr.es/m/959917.1657522169%40sss.pgh.pa.us
---
doc/src/sgml/installation.sgml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index 381b728e08..2aacc233e6 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -2153,6 +2153,14 @@ export MANPATH
<email>pgsql-hackers@lists.postgresql.org</email> is the appropriate place
to discuss that.
</para>
+
+ <para>
+ Historical versions of <productname>PostgreSQL</productname> or POSTGRES
+ also ran on CPU architectures including Alpha, Itanium, M32R, M68K,
+ M88K, NS32K, SuperH, and VAX, and operating systems including 4.3BSD, BEOS,
+ BSD/OS, DG/UX, Dynix, HP-UX, IRIX, NeXTSTEP, OSF, QNX, SCO, SINIX, Sprite,
+ SunOS, and ULTRIX.
+ </para>
</sect1>
<sect1 id="installation-platform-notes">
--
2.30.2
Thomas Munro <thomas.munro@gmail.com> writes:
Here's a patch to remove all of these.
Looks sane by eyeball --- I didn't grep for other references, though.
I didn't originally suggest that because of some kind of (mostly
vicarious) nostalgia. I wonder if we should allow ourselves a
paragraph where we remember these systems. I personally think it's
one of the amazing things about this project. Here's what I came up
with, but I'm sure there are more.
PlayStation 2 [1]/messages/by-id/05e101c1834a$e398b920$f90e10ac@toronto.redhat.com? Although I suppose that falls under MIPS,
which probably means we could still run on it, if you can find one.
regards, tom lane
[1]: /messages/by-id/05e101c1834a$e398b920$f90e10ac@toronto.redhat.com
On Tue, Jul 12, 2022 at 10:30 AM Tom Lane <tgl@sss.pgh.pa.us> wrote:
Thomas Munro <thomas.munro@gmail.com> writes:
Here's a patch to remove all of these.
Looks sane by eyeball --- I didn't grep for other references, though.
Thanks, pushed.
I didn't originally suggest that because of some kind of (mostly
vicarious) nostalgia. I wonder if we should allow ourselves a
paragraph where we remember these systems. I personally think it's
one of the amazing things about this project. Here's what I came up
with, but I'm sure there are more.PlayStation 2 [1]? Although I suppose that falls under MIPS,
which probably means we could still run on it, if you can find one.
Yeah. PS had MIPS, then PowerPC (Cell), and currently AMD
(interestingly they also run a modified FreeBSD kernel, but you can't
really get at it...). Sega Dreamcast had SH4.
I added one more: Tru64 (but I didn't bother to list Digital UNIX or
OSF/1, not sure if software historians consider those different OSes
or just rebrands...). Patches to improve this little paragraph
welcome. Pushed.