| Topic | Mailing Lists | Activity | Participants |
|---|---|---|---|
12 commits pg_test_timing: Show additional TSC clock source debug info master19beta1REL_19_STABLE19beta1 instrumentation: Avoid CPUID 0x15/0x16 for Hypervisor TSC frequency master19beta1REL_19_STABLE19beta1 pg_test_timing: Also test RDTSC[P] timing, report time source, TSC frequency master19beta1REL_19_STABLE19beta1 instrumentation: Use Time-Stamp Counter on x86-64 to lower overhead master19beta1REL_19_STABLE19beta1 instrumentation: Standardize ticks to nanosecond conversion method master19beta1REL_19_STABLE19beta1 +7 more Reduce timing overhead of EXPLAIN ANALYZE using rdtsc? 12 commits pg_test_timing: Show additional TSC clock source debug info master19beta1REL_19_STABLE19beta1 instrumentation: Avoid CPUID 0x15/0x16 for Hypervisor TSC frequency master19beta1REL_19_STABLE19beta1 pg_test_timing: Also test RDTSC[P] timing, report time source, TSC frequency master19beta1REL_19_STABLE19beta1 instrumentation: Use Time-Stamp Counter on x86-64 to lower overhead master19beta1REL_19_STABLE19beta1 instrumentation: Standardize ticks to nanosecond conversion method master19beta1REL_19_STABLE19beta1 +7 more 171 replies May 16, 15:53 | hackers | 171 replies May 16, 15:53 | 16 |